Design Engineer in Cambridge

Microchip Technology is looking for a graduate with 2-3 years relevant work experience to work in a team that is developing system IPs and designing 32-bit Micro-controller SoC products. This team does design, verification, FPGA emulation and implementation of SoC products. We are looking to hire talented engineers who are interested to work in any of these functional teams (design, verification, FPGA emulation and implementation).

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

• Write System Verilog RTL for System IP modules and SoC level integration to build 32-bit Microcontroller products.
• Generate and maintain Micro architecture specification (MAS) at module and SoC level and other design flow documentation.
• Develop verification requirements and test plan.
• Develop C and SystemVerilog/UVM tests for verification of System IP and SoC.
• Debug RTL and gate level simulations at SoC level.
• Port System IP and SoC to FPGA for prototyping.
• Develop C based tests to validate IP and SoC on FPGA.
• Perform synthesis and timing analysis.
• Work closely with architecture, applications, and implementation teams to enable correct by construction design.
• Perform quality checks as per our standard development flow.
• Help develop scripts to automate RTL generation process.

• BSEE minimum, MSEE preferred.
• Should have relevant 2-3 years relevant work experience.
• Understanding of Micro-controller architecture and products.
• Good programming skills in Verilog, System Verilog, C, PERL.
• Experience using EDA tools such as Questasim, VCS, NCSim, NCVerilog.
• Studied VLSI, Computer Architecture, Digital Design, C++ Programming during the course work.
• Knowledge on Clock domain crossing and timing constraints.

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