At a Glance
- Tasks: Join our team to design and implement cutting-edge digital IP/SoC projects.
- Company: Be part of a leading company in ASIC and IP development, based in Theale or Bristol.
- Benefits: Enjoy a collaborative environment, continuous learning opportunities, and mentorship.
- Why this job: Work on high-impact projects with a talented team, pushing the boundaries of digital design.
- Qualifications: Degree in Electrical Engineering or Computer Science; 5+ years in digital design required.
- Other info: Contribute to technical publications and engage with customers and vendors.
The predicted salary is between 48000 - 84000 £ per year.
Are you ready to take the next step in your career and contribute to cutting-edge ASIC and IP/SoC development? We are looking for an experienced Design Engineer to join our team in either Theale or Bristol. This is an exciting opportunity to work with a talented team on high-impact projects, pushing the boundaries of digital design in a collaborative and fast-paced environment.
As a key technical contributor, you will work closely with ASIC engineering management to define and implement digital IP/SoC designs, and integrate these with third-party designs into customer ASICs and SoCs. You’ll be part of a multi-site development team, ensuring the delivery of high-quality designs that meet customer requirements and solving complex technical challenges.
Key Responsibilities:- Design & Implementation: Specify, micro-architect, implement, and perform design verification for complex RTL IP blocks, from basic SoC building blocks to advanced video processing and encoding/decoding logic.
- IP Development Cycle: Take part in the full lifecycle of IP development—from customer concept to backend layout and silicon validation.
- Collaboration: Work closely with SoC architects to ensure designs align with project requirements and integrate seamlessly with the rest of the SoC.
- Technical Guidance: Provide technical advice and solutions to design, verification, physical design, silicon validation, and production test teams.
- Customer & Team Engagement: Analyse customer requirements and implement functional digital designs and integration flows for complex SoCs. Provide support for customer-facing technical discussions.
- Tool & Script Development: Develop, maintain, and deploy proprietary scripts and tools for ASIC/SoC design and database management. Leverage industry-leading EDA tools for design quality assurance, power optimisation, and synthesis/timing analysis.
- Continuous Learning: Stay up-to-date with the latest advances in engineering technologies and methodologies to maintain our competitive edge.
- Mentorship: Coach junior engineers and support them in all aspects of design activities, including coding, synthesis, debug, DFT, and backend integration.
- Technical Publications: Contribute to technical white papers, and provide sales support as part of a collaborative team.
- Internal: Collaborate with Engineers, Senior Engineers, Principal Engineers, Project Managers, Sales, Finance, and HR teams.
- External: Technical communication with customers (minimal), and liaising with EDA Tool Vendors, Foundries, and Assembly Houses.
- Essential: Degree/Masters or PhD in Electrical Engineering, Computer Science, or a related field. Typically, 5+ years of relevant experience in digital design and IP/SoC development.
- Desirable: A Masters or PhD in a related subject with practical experience of 5+ years.
- Essential: Expertise in IP design, implementation, and verification. Strong knowledge of RTL synthesis, performance, and power analysis. In-depth understanding of digital design concepts and problem-solving capabilities. Proficient in HDL coding (VHDL, Verilog, SystemVerilog). System design knowledge, including clock domain management, reset schemes, and power management. Experience with SoC level verification (HW/SW co-verification, multi-mode simulation, gate-level simulation). Experience with design checking tools (Lint, CDC, LEC). Strong communication skills and ability to provide technical guidance to junior engineers.
- Desirable: Familiarity with ARM processor subsystems, video processing, bus protocols (AXI/AHB/ACE). Experience with low power design methodology (UPF/CPF) and synthesis/timing analysis. Experience with Tcl, Perl, Python, SystemC, IPXACT, and database management. Familiarity with Linux software frameworks.
- Self-motivated with the ability to work independently and as part of a team.
- Strong problem-solving skills and ability to adapt quickly to changing priorities.
- Excellent attention to detail and time management skills.
- A fast learner who thrives in a dynamic, collaborative environment.
Digital Design Engineer employer: LinkedIn
Contact Detail:
LinkedIn Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Digital Design Engineer
✨Tip Number 1
Make sure to showcase your experience with RTL synthesis and digital design concepts during any discussions. Highlight specific projects where you've successfully implemented complex IP blocks, as this will demonstrate your hands-on expertise.
✨Tip Number 2
Familiarise yourself with the latest EDA tools and methodologies relevant to ASIC/SoC design. Being able to discuss recent advancements or tools you’ve used can set you apart and show your commitment to continuous learning.
✨Tip Number 3
Engage with current employees on platforms like LinkedIn to gain insights into the company culture and team dynamics. This can help you tailor your approach and demonstrate your genuine interest in joining our collaborative environment.
✨Tip Number 4
Prepare to discuss how you've provided technical guidance to junior engineers in the past. Sharing specific examples of mentorship can highlight your leadership skills and ability to contribute positively to our team.
We think you need these skills to ace Digital Design Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights relevant experience in digital design and IP/SoC development. Emphasise your expertise in RTL synthesis, HDL coding, and any specific tools or methodologies mentioned in the job description.
Craft a Compelling Cover Letter: Write a cover letter that showcases your passion for digital design and your understanding of the role. Mention specific projects or experiences that align with the responsibilities outlined in the job description.
Highlight Technical Skills: In your application, clearly list your technical skills related to the position, such as proficiency in VHDL, Verilog, SystemVerilog, and any experience with EDA tools. This will help demonstrate your fit for the role.
Showcase Collaboration Experience: Since the role involves working closely with various teams, include examples of past collaborative projects. Highlight your ability to communicate effectively and provide technical guidance to others.
How to prepare for a job interview at LinkedIn
✨Showcase Your Technical Expertise
Be prepared to discuss your experience with RTL synthesis, digital design concepts, and verification processes. Highlight specific projects where you implemented complex IP blocks and how you overcame technical challenges.
✨Demonstrate Collaboration Skills
Since the role involves working closely with SoC architects and other teams, share examples of how you've successfully collaborated in past projects. Emphasise your ability to communicate effectively and provide technical guidance to junior engineers.
✨Stay Updated on Industry Trends
Research the latest advancements in ASIC and IP/SoC development before the interview. Being knowledgeable about current technologies and methodologies will show your commitment to continuous learning and maintaining a competitive edge.
✨Prepare for Customer-Facing Scenarios
Although customer interaction is minimal, be ready to discuss how you would analyse customer requirements and implement functional designs. Think of examples where you provided technical support or engaged in discussions with clients.