Apple in Cambridge is seeking a GPU Top Level Physical Design engineer to collaborate with FE to translate RTL into efficient physical design. You will lead PD efforts, establish guidelines, and drive top-level place-and-route integration with cross-functional teams.
The role requires hands-on PD work on large-scale GPU blocks, with emphasis on clock/power distribution, floorplanning, and IP integration, to ensure high performance and power efficiency.
#J-18808-Ljbffr
