Kandou is seeking an Analog Layout Engineer (Lead) to drive layout and verification of high-speed analog circuits and IP for multi-Gigabit data links across advanced nodes (28nm, 14/16nm, 7nm). You will interact with design teams, support IP integration, and assist customers on requirements and IP delivery, including exposure to flip-chip packaging.
Location flexibility across EU/CH/UK. Must have proven experience in custom analog layout for high-speed links, and strong knowledge of layout
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Lead Analog Layout Engineer – High-Speed SerDes Expert employer: Kandou Bus SA
At Kandou, we pride ourselves on being an innovative employer that fosters a collaborative and dynamic work culture in Reading. Our commitment to employee growth is evident through continuous learning opportunities and the chance to work on cutting-edge AI technology that is reshaping the industry. Join us to be part of a team that values creativity, encourages best practices, and offers a unique environment where your contributions directly impact the future of AI infrastructure.
