SoC Design Architect (ASIC Digital Systems)

Working for a cutting-edge semiconductor company, I am looking to recruit a SOC Design Architect for fascinating and brand-new project work. The position is available for engineers/applicants who can demonstrate experience in full chip design, architecture, and delivery (to tape-out). Salary is dependent on years of experience – circa £75-90k, with excellent package and benefits. Based in Cambridgeshire, you will be responsible for the end-to-end SOC architecture of new chips for innovative products in the market. BSc / MSc / PhD in Microelectronics, physics, or a related field Approximately 5-10 years\’ experience in digital IC design and SOC architecture Deep understanding of MCUs Subsystems, Memory Controllers, and memory architectures (e.g., SRAM, ROM, eFuse) Extensive experience with the Digital ASIC Flow, RTL design, and debug methodologies (e.g., DFT, JTAG, Scan, BIST) Extensive knowledge of SOC architecture, setup/silicon bring-up, validation, and related processes IP selection & top-level integration SOC performance & modeling (e.g., UML) DSP / signal processing / communication protocols Digital-AMS chip development – digital to analog interfaces Low-power, performance, and optimization Low-level software, firmware, and embedded requirements – drivers, controllers, etc. #J-18808-Ljbffr