Senior FPGA Design Engineer

Based in the English Riviera, this exciting new opportunity will join an established startup company to develop technologies for a sustainable future through ML and Datacentre technologies.

The experience FPGA Design Engineer will be responsible for FPGA Design for the development of high-speed network interface cards. Key responsibilities will include Microarchitecture definition, RTL Implementation / synthesis/timing closure, Verification / Testing using SystemVerilog and delivering & validating FPGA based lab setups for trials.

The successful candidate will have a good relevant degree, along with:

1. Extensive hand on industry experience of FPGA Design for network applications a 100Gbps and above
2. Experience using PCIe, CXL, RDMA, DDR4, bare metal use of high-speed transceivers, Ethernet, IP.
3. Comprehensive understanding of clock domain crossing techniques.
4. Strong knowledge of FPGA tool flows (synthesis, partitioning, place & route, timing analysis).
5. Excellent skills in SystemVerilog/Verilog/VHDL.
6. Scripting in Python / Tcl.

The company offers an excellent salary, along with a bonus up to 85%, flexible and hybrid working, exciting technology, and a great team working environment in new offices. Please apply with your CV for more information.

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