Lead Ultra-Low Latency C++/FPGA Engineer

Lead Ultra-Low Latency C++/FPGA Engineer

Full-Time On-site
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JPMorgan Chase & Co. in London seeks an Ultra Low Latency Lead Software Engineer to design, build, and operate market gateway solutions with FPGA acceleration, delivering deterministic performance for high-speed trading.

You will collaborate with hardware and software teams, drive latency optimization, implement end-to-end pipelines, and lead development across Unix/Linux environments, CI/CD, and secure engineering practices to support global markets.

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Lead Ultra-Low Latency C++/FPGA Engineer employer: JPMorgan Chase & Co.

JPMorgan Chase & Co. is an exceptional employer, offering a dynamic work environment in the heart of Londonโ€™s International Private Bank. With a strong emphasis on professional development, employees benefit from comprehensive training programs and opportunities for career advancement, all while enjoying a collaborative culture that values teamwork and innovation. The role of Executive Assistant not only provides a chance to work closely with senior leaders but also allows for meaningful contributions to the success of the team in a prestigious financial institution.

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Contact Details:

JPMorgan Chase & Co. Recruitment Team

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