At a Glance
- Tasks: Ensure functional correctness and performance of complex digital ASIC designs.
- Company: Leading managed service provider partnering with a global semiconductor powerhouse.
- Benefits: Up to £80,000 salary, remote work, and standard benefits.
- Why this job: Join a rapidly growing team and work on challenging ASIC/SoC projects.
- Qualifications: Strong SystemVerilog/UVM expertise and experience in digital logic design.
- Other info: Fully remote within the UK with quarterly visits to London HQ.
The predicted salary is between 48000 - 64000 £ per year.
Location: London HQ | Fully remote within the UK (quarterly visits). Salary: Up to £80,000 base.
I’m currently recruiting for a Design Verification Engineer on behalf of a leading managed service provider that is partnering with a global semiconductor powerhouse to build and expand a UK-based chip development team. This is an excellent opportunity to join a rapidly growing UK operation while working on technically challenging, large-scale ASIC/SoC projects, alongside well-established global engineering teams. The role is fully remote within the UK, with quarterly visits to the London headquarters. There are multiple opportunities available as the team continues to scale.
Role Overview
You’ll be responsible for ensuring the functional correctness, performance, and specification compliance of complex digital ASIC core and IP designs. The role focuses on deep unit- and core-level verification.
Key Responsibilities
- Develop comprehensive core verification plans based on micro-architecture and design specifications.
- Architect and implement robust, reusable verification environments using SystemVerilog and UVM.
- Create and execute constrained-random and directed tests to achieve high levels of functional and code coverage.
- Analyse simulation results, debug complex failures, and work closely with RTL design teams to root-cause and resolve issues.
- Develop and maintain Python and Perl scripts to improve verification flows and regression management.
Qualifications
- Strong SystemVerilog/UVM expertise (essential).
- Solid understanding of digital logic design and verification methodologies.
- Experience verifying digital systems using standard IP components and interconnects.
- Project experience within the ARM ecosystem, including Cortex-M7, CoreSight, NIC, and other AMBA-based interconnects.
- Familiarity with AMBA protocols and SoC system debug infrastructure.
- Strong experience with micro-architecture, Verilog/SystemVerilog, synthesis, timing constraint development, lint, and CDC checks.
- Experience with scripting (Python and/or Perl).
Eligibility & Package
UK residency is required; relocation is not supported and only UK-based candidates can be considered. Visa sponsorship is available, where applicable. Base salary up to £80,000, dependent on experience, plus standard benefits.
Design Verification Engineer - IC Resources in London employer: Jobster
Contact Detail:
Jobster Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Design Verification Engineer - IC Resources in London
✨Tip Number 1
Network like a pro! Reach out to your connections in the semiconductor and design verification space. Attend industry meetups or webinars, and don’t be shy about asking for introductions. We all know that sometimes it’s not just what you know, but who you know!
✨Tip Number 2
Show off your skills! Create a portfolio showcasing your projects, especially those involving SystemVerilog and UVM. This can be a game-changer during interviews, as it gives potential employers a tangible look at what you can do. We recommend having this ready when applying through our website!
✨Tip Number 3
Prepare for technical interviews by brushing up on your knowledge of digital logic design and verification methodologies. Practice explaining complex concepts clearly and concisely. We suggest doing mock interviews with friends or using online platforms to get comfortable with the format.
✨Tip Number 4
Follow up after interviews! A quick thank-you email can leave a lasting impression. It shows your enthusiasm for the role and keeps you fresh in their minds. We’re all about making connections, so don’t miss this chance to stand out!
We think you need these skills to ace Design Verification Engineer - IC Resources in London
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Design Verification Engineer role. Highlight your SystemVerilog and UVM expertise, and any relevant project experience within the ARM ecosystem. We want to see how your skills match what we're looking for!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about this role and how your background makes you a great fit. Don’t forget to mention your experience with digital logic design and verification methodologies.
Showcase Your Projects: If you've worked on any projects that involved ASIC/SoC designs or verification environments, make sure to include them in your application. We love seeing real-world examples of your work and how you’ve tackled challenges in the past.
Apply Through Our Website: We encourage you to apply through our website for a smoother process. It helps us keep track of applications and ensures you don’t miss out on any important updates. Plus, it’s super easy!
How to prepare for a job interview at Jobster
✨Know Your Stuff
Make sure you brush up on your SystemVerilog and UVM knowledge. Be ready to discuss your experience with digital logic design and verification methodologies, as well as any projects you've worked on within the ARM ecosystem. This is your chance to show off your expertise!
✨Prepare for Technical Questions
Expect some deep technical questions about core verification plans and how you approach debugging complex failures. Practise explaining your thought process clearly and concisely, as this will demonstrate your problem-solving skills and technical acumen.
✨Showcase Your Scripting Skills
Since scripting in Python and Perl is part of the role, be prepared to discuss how you've used these languages to improve verification flows. If possible, bring examples of scripts you've written or explain how they enhanced your previous projects.
✨Ask Insightful Questions
At the end of the interview, don’t forget to ask questions! Inquire about the team dynamics, the types of ASIC/SoC projects you'll be working on, or how the company supports professional development. This shows your genuine interest in the role and helps you assess if it's the right fit for you.