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For Companies At a Glance
- Tasks: Lead verification for complex digital IP and build scalable environments.
- Company: Global engineering organisation with a focus on innovative chip development.
- Benefits: Competitive salary up to £75,000, fully remote work, and quarterly London visits.
- Why this job: Join a pioneering team and work on cutting-edge ASIC Core/IP projects.
- Qualifications: 3-4+ years in digital verification and strong SystemVerilog/UVM skills.
- Other info: Dynamic role with opportunities for professional growth and collaboration.
The predicted salary is between 60000 - 75000 £ per year.
A leading global engineering organisation is building a new UK chip team to support a major US tech programme. They’re looking for experienced Digital Verification Engineers to work on advanced ASIC Core/IP development. Fully remote across the UK with quarterly visits to London.
What You’ll Do
- Own unit‑level and core‑level verification for complex digital IP
- Build scalable SystemVerilog/UVM environments
- Develop constrained‑random and directed tests to drive high coverage
- Debug failures across RTL, testbench, and micro‑architecture
- Automate regressions and flows using Python/Perl
- Work with modern IP ecosystems: microprocessor cores, memory subsystems, AMBA interconnects, system debug logic
What You Bring
- 3–4+ years of digital verification experience
- Strong SystemVerilog/UVM expertise
- Solid understanding of digital logic and verification methodologies
- Experience with ARM‑based components (M‑class cores, NIC, Coresight, AMBA protocols)
- Familiarity with SoC interfaces: QSPI, UART, GPIO
- Exposure to synthesis concepts, timing constraints, lint, CDC
- Strong debugging skills and confidence working with RTL/micro‑architect teams
Salary
Base salary up to £75,000, depending on experience.
Senior Design Verification Engineer - IC Resources in City of London employer: Jobster
Contact Detail:
Jobster Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior Design Verification Engineer - IC Resources in City of London
✨Tip Number 1
Network like a pro! Reach out to your connections in the industry, especially those who work in digital verification. A friendly chat can lead to insider info about job openings that aren’t even advertised yet.
✨Tip Number 2
Show off your skills! Create a portfolio or a GitHub repository showcasing your projects and achievements in SystemVerilog/UVM. This gives potential employers a tangible look at what you can do beyond your CV.
✨Tip Number 3
Prepare for interviews by brushing up on common technical questions related to digital verification. Practice explaining your debugging process and how you’ve tackled challenges in past projects. Confidence is key!
✨Tip Number 4
Don’t forget to apply through our website! We’ve got loads of opportunities waiting for talented engineers like you. Plus, it’s a great way to ensure your application gets seen by the right people.
We think you need these skills to ace Senior Design Verification Engineer - IC Resources in City of London
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience in digital verification and showcases your expertise in SystemVerilog/UVM. We want to see how your skills align with what we’re looking for, so don’t be shy about making it relevant!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you’re the perfect fit for our team and how your background in ASIC Core/IP development can contribute to our exciting projects. Keep it engaging and personal.
Show Off Your Projects: If you’ve worked on any cool projects related to digital verification or ARM-based components, make sure to mention them! We love seeing real-world applications of your skills, so don’t hold back on the details.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it’s super easy – just a few clicks and you’re done!
How to prepare for a job interview at Jobster
✨Know Your Stuff
Make sure you brush up on your SystemVerilog and UVM knowledge. Be ready to discuss your past projects and how you've tackled complex digital verification tasks. The more specific examples you can provide, the better!
✨Showcase Your Debugging Skills
Prepare to talk about your debugging experiences. Think of a few challenging scenarios where you identified and resolved issues in RTL or testbenches. This will demonstrate your problem-solving abilities and confidence in working with micro-architecture teams.
✨Familiarise Yourself with the Tech Stack
Get comfortable with the tools and technologies mentioned in the job description, like ARM-based components and SoC interfaces. Being able to discuss these topics will show that you're not just a fit for the role but also genuinely interested in the work.
✨Ask Insightful Questions
Prepare some thoughtful questions about the team and the projects you'll be working on. This shows your enthusiasm for the role and helps you gauge if the company culture aligns with your values. Plus, it gives you a chance to learn more about their tech programme!
