Senior / Staff / Principal Analog Design Engineer - PLL

Join to apply for the Senior / Staff / Principal Analog Design Engineer – PLL role at Flux Computing1 week ago Be among the first 25 applicantsJoin to apply for the Senior / Staff / Principal Analog Design Engineer – PLL role at Flux ComputingFlux Computing designs and manufactures optical processors to train and run inference on large AI models. Join us to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed.The RoleWe’re searching for a Senior/Staff Analog Design Engineer with a strong focus on CMOS phase‑locked loops (PLLs) and clock‑distribution networks. You will architect, design and bring to production an ultra‑low‑jitter clocking subsystem that fans out precise multi‑GHz clocks to more than 100 parallel optical‑compute channels inside the OTPU. The work spans fractional‑N synthesisers, on‑chip loop filters, de‑skew circuits and high‑integrity clock‑tree distribution—all while meeting stringent power, spur and phase‑noise budgets required by next‑generation AI workloads.ResponsibilitiesArchitect, design and verify wide‑bandwidth fractional‑N PLLs (multi‑GHz output) including VCOs, charge pumps, loop filters and frequency dividers to achieve sub‑100 fs rms integrated jitter. 100 destination blocks with Co‑optimise the PLL with packaging, board, and power‑delivery teams to minimise supply‑induced jitter, crosstalk and electromagnetic coupling in a dense optical‑compute environment.Create behavioural and transistor‑level models (Verilog‑A / SPICE) for system‑level co‑simulation of timing budgets, ensuring reliable link margins across PVT corners.Drive post‑layout extraction, Monte‑Carlo analysis, and silicon bring‑up—including on‑wafer phase‑noise measurements, jitter transfer curves, and clock‑tree eye diagrams.Mentor junior engineers, lead rigorous design reviews, and champion best‑practice methodologies for low‑jitter analog design and measurement.Track and inject into the team the latest advances in PLL architectures, adaptive biasing, clock‑mesh techniques, and on‑chip jitter‑monitoring.Skills & Experience7 + years of industry experience designing production CMOS PLLs, CDRs or other precision clock generators.Demonstrated success achieving sub‑100 fs rms jitter and Mastery of analog/RF EDA tools for schematic capture, SPICE‑/S‑parameter simulation, layout, parasitic extraction and mixed‑signal verification.Deep understanding of phase‑noise theory, loop‑dynamics, supply‑noise coupling, clock‑tree deskew and electromagnetic crosstalk.Bachelor’s degree in Electrical Engineering (or related); Master’s / PhD preferred.Excellent problem‑solving, communication and cross‑disciplinary collaboration abilities.Thrive in rapid‑iteration, high‑ownership environments; bring a portfolio of patents, publications or personal projects that showcases innovative clock‑generation or high‑speed analog design.Frequent travel is expected between our Austin and London offices.We’re building fast and that includes our benefits. More exciting additions are coming soon for the Flux crew.If you are passionate about pushing the boundaries of what\’s possible in AI and thrive in a high-energy, fast-paced environment, we want to hear from you. Apply now to join Flux and be a key player in shaping the future of computing.Seniority levelSeniority levelMid-Senior levelEmployment typeEmployment typeFull-timeJob functionJob functionEngineering and Information TechnologyIndustriesSemiconductor ManufacturingReferrals increase your chances of interviewing at Flux Computing by 2xGet notified about new Analog Design Engineer jobs in London, England, United Kingdom.City Of London, England, United Kingdom 1 month agoLondon, England, United Kingdom 3 weeks agoLondon, England, United Kingdom 3 weeks agoRedhill, England, United Kingdom 2 weeks agoGreater London, England, United Kingdom 1 week agoGreater London, England, United Kingdom 1 week agoLondon, England, United Kingdom 2 days agoLondon, England, United Kingdom 1 week agoSunbury-On-Thames, England, United Kingdom 5 days agoLondon, England, United Kingdom 2 days agoLondon, England, United Kingdom 2 months agoLondon, England, United Kingdom 1 week agoLondon, England, United Kingdom 3 weeks agoDesign Engineer – London, London, EC4Y 0ABLondon, England, United Kingdom 2 days agoLondon, England, United Kingdom 1 month agoWest Byfleet, England, United Kingdom 4 days agoHarrow, England, United Kingdom 5 months agoWest Byfleet, England, United Kingdom 1 month agoLondon, England, United Kingdom $110,000.00-$160,000.00 1 week agoLondon, England, United Kingdom 1 year agoLondon, England, United Kingdom 2 weeks agoLondon, England, United Kingdom $70,000.00-$150,000.00 1 month agoFounding Design Engineer @cubic (YC X25)London, England, United Kingdom £70,000.00-£90,000.00 1 month agoWatford, England, United Kingdom 1 month agoLondon, England, United Kingdom 1 week agoLondon, England, United Kingdom 5 days agoWe’re unlocking community knowledge in a new way. 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