Principal Analog Mixed Signal ASIC Layout Engineer

Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas necessary for true innovation. For more information about Draper, visit www.draper.com. Job Description Summary: We are seeking a talented and motivated individual to join the analog mixed signal (AMS) ASIC team at Draper. The physical silicon design group is responsible for creating complex analog layouts from schematics in collaboration with other members of our incredible team. These layouts are used in ASICs for national security, biomedical, and space applications. While we are seeking a principal level engineer, considerations will be made at all levels for particularly capable applicants. A successful candidate will assist ASIC development through creating custom analog layouts, floor planning entire chips, high level problem solving, and executing tape outs. Skills with organizing and leading other layout engineers is also highly valued.The ideal applicant is fully capable of working independently and communicating effectively with team members across different disciplines as well as program management. The candidate must have an understanding of silicon processing and the effect on circuit performance. Comprehension of and the ability to communicate about basic analog circuits is also desired.While hybrid or remote work may be available, this position will have mandatory on-site work.Job Description: Duties/Responsibilities Design and simulate circuits at transistor-level to implement architecture and requirement specificationsContribute to system-level designOptimize hardware designs for performance, power, and costEvaluate the hardware feasibility of complex algorithms and requirementsIndependently contribute to complex chip architectures and designsIndependently drive solutions to complex problems – develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirementsContribute to business development and proposal activitiesDevelop, document, and teach best practices to less experienced engineersPerform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitics, contribute to design-for-test development.Perform other duties as assignedSkills/Abilities Proficiency in integrated circuit designUnderstanding of integrated circuits, semiconductors, and general computer architectureAbility to write detailed design specificationsAbility to lead multi-disciplinary technical teamsExcellent verbal and written communication skillsExcellent mathematical skillsExcellent organizational skills and attention to detailExcellent time management skills with the proven ability to meet deadlinesStrong analytical and problem-solving skillsAbility to prioritize tasksDemonstrate strong organization, planning, and time management skills to achieve program goalsEducation Requires a bachelor\’s degree in Engineering, or related field. Masters degree preferred.Experience Requires 7-10 years of experience with a bachelor\’s degree, or 5-10 years of experience with a master\’s degree in ASIC Hardware Engineering or related. Preferred Qualifications: Experience with low power circuit designExperience with CMOS advanced nodes below 32nmExperience with radiation-hardened electronicsAdditional Job Description: Experience with Cadence Virtuoso and Siemens Calibre tools. High proficiency in implementing analog designs into full custom layout. PLLs, DACs/ADCs, high speed SerDes, bandgaps, ESD/IO, and more. Ability to recognize layouts vulnerable to failure and ways to fix. ESD/LU, DFM, etc. Fluent in layout effects and how circuit performance can be affected. NW proximity, length-of-diffusion, implant shadowing, EM/IR, self-heating, coupling capacitance, matching techniques, etc. Significant experience with understanding and debugging DRC, LVS, PM, and other physical verification tools and methodologies. Ability to be the sole layout resource for an entire chip, from transistor level layout to chip level integration and tape out. Experience with chip level/top down floor planning, delegating work to other layout resources in a small team, and communicating technical information across different disciplines and experience levels. Preferred experience with automated tools (Cadence ModGen/autorouter/EAD, Innovus, etc), and methods for transferring data between domains (abstract/LEF). Able to motivate themselves and operate independently. Ability to mentor others and willingness to be mentored. Experience operating in a Linux environment. Preferred experience with scripting (SKILL, SVRF, tcl). Experience with FinFET processes, 22nm to 7nm and below. Applicants selected for this position will be required to obtain and maintain a government security clearance Connect With Draper for Future Opportunities! If you don\’t find the right posting in our Career Opportunities, you may submit your resume for future consideration. Job Location – City: CambridgeJob Location – State: MassachusettsJob Location – Postal Code: 02139-3563Our work is very important to us, but so is our life outside of work. Draper supports many programs to improve work-life balance including workplace flexibility, employee clubs ranging from photography to yoga, health and finance workshops, off site social events and discounts to local museums and cultural activities. If this specific job opportunity and the chance to work at a nationally renowned R&D innovation company appeals to you, apply nowwww.draper.com/careers. Draper is committed to creating an inclusive environment. We understand the value of inclusivity and its impact on a high-performance culture. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, disability, age, sexual orientation, national origin, veteran status, or genetic information. Draper is committed to providing access, equal opportunity, and reasonable accommodation for individuals with disabilities in employment, its services, programs, and activities. To request reasonable accommodation, please contact hr@draper.com.#J-18808-Ljbffr