Senior Validation & Verification Engineer (Permanent) in Oxford

This is a unique opportunity to join an innovative quantum technology company as one of the first UVM Verification Engineers within its growing Oxford team. You will have significant autonomy and the opportunity to take ownership of the verification environment, helping to define the methodology, infrastructure and best practices used across the team. You will work at the intersection of FPGA development and quantum technology, helping to develop and verify the sophisticated control systems that underpin next-generation quantum computing platforms. As a Senior Verification Engineer, you will play a key role in developing the verification environments and methodologies used across complex FPGA designs. Working closely with FPGA and RTL Design Engineers, you will take ownership of verification infrastructure and help establish best practices across simulation, verification and test. Working closely with RTL Design Engineers to debug failures, identify root causes and improve overall design quality Helping define and drive verification methodology and best practices across the wider FPGA team Verification planning and requirements gathering Python for scripting and test automation This would particularly suit a Verification Engineer who wants to move into a position with greater ownership and autonomy, helping to shape verification architecture and methodology rather than simply working within an established environment. It also offers the opportunity to apply your verification experience to complex FPGA designs within the rapidly developing field of quantum technology. On offer is a competitive base salary, RSUs and bonus. Visa sponsorship and relocation support can be provided for engineers who are already living and working in the UK and require support to move to Oxford. Unfortunately, relocation and visa sponsorship for candidates currently based outside the UK are not available at this time.