Hardware Verification Engineer in Cambridge

I am seeking a Senior Verification Engineer to join a rapidly growing HW Team in Cambridge. You will get the opportunity to work on cutting edge technology and in the area of quantum computing. No prior experience in quantum computing? No problem. You'll learn as you go while working alongside world-class engineers in a truly cross-disciplinary environment.
As a Senior Verification Engineer, you will take ownership of verification across block, subsystem, and multi-FPGA system-level designs.
With visibility across the entire stack, you will partner closely with the Lead Verification Engineer to define and deliver the verification strategy.
As a key member of the verification team, you will:
Own the strategy and execution for block-level, subsystem, and multi-FPGA system designs
Develop scalable UVM-based testbenches that push boundaries
Drive verification efforts with a sharp focus on risk, coverage, and system-level behaviour
Key skills
Strong hands-on expertise in SystemVerilog and UVM
Proven ability to debug across RTL, simulation, and hardware
Ability to work effectively with ambiguity and changing requirements
Demonstrable commercial experience in functional verification, including ownership of verification planning and strategy
Exposure to different programming languages, such as C, C++ and Python
Formal verification experience(plus)
Experience mentoring junior verification engineers
The salary range for this role is broad, as they are able to consider varying levels of experience.
For more information contact Rachel Mason at IC Resources.