Staff Digital Design Engineer - CPU Architecture & RISC-V
Staff Digital Design Engineer - CPU Architecture & RISC-V

Staff Digital Design Engineer - CPU Architecture & RISC-V

Full-Time 48000 - 84000 ÂŁ / year (est.) No home office possible
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At a Glance

  • Tasks: Design and implement cutting-edge CPU architectures for next-gen AI hardware.
  • Company: Join Innatera, a fast-growing Dutch semiconductor company revolutionising AI technology.
  • Benefits: Enjoy competitive salary, flexible work options, and a supportive team culture.
  • Why this job: Make a real impact in the world of AI by shaping future technologies.
  • Qualifications: 7+ years in digital design with expertise in RISC-V CPU architecture.
  • Other info: Collaborative environment with opportunities for personal and professional growth.

The predicted salary is between 48000 - 84000 ÂŁ per year.

Join to apply for the Staff Digital Design Engineer - CPU Architecture & RISC-V role at Innatera.

About Innatera

Innatera is a rapidly growing Dutch semiconductor company that develops ultra‑efficient neuromorphic processors for AI at the edge. These microprocessors mimic the brain’s mechanisms for processing fast data streams from sensors, enabling complex turn‑key sensor analytics functionalities, with 10,000× higher performance per watt than competing solutions. Innatera's technology serves as a critical enabler for next‑generation use cases in the IoT, wearable, embedded, and automotive domains.

We’re looking for a Staff Digital Design Engineer to take technical ownership of RISC‑V‑based CPU architecture and subsystem integration in our next‑generation neuromorphic SoCs. In this high‑impact role, you’ll lead the design and implementation of advanced CPU cores and digital IPs, from high‑level specification to final sign‑off. You’ll be instrumental in driving architectural decisions, RTL development, and SoC integration, while collaborating closely with verification, backend, and software teams.

We will trust you with:

  • Design and architect advanced CPU cores and micro‑architectures, with particular expertise in RISC‑V instruction sets and extensions;
  • Translate high‑level architectural requirements into detailed micro‑architectural specifications for CPU designs;
  • Collaborate with verification engineers to ensure comprehensive testing and validation of CPU IP, including instruction set compliance and performance;
  • Define and implement SoC‑level architectures, specifically focusing on the integration of CPU cores and their interaction with other IP and subsystems;
  • Assist in verifying SoC functionality through top‑level testing, ensuring robust system performance, especially regarding CPU operation;
  • Perform RTL coding and debugging of CPU cores and related logic using Verilog or System Verilog;
  • Conduct RTL and gate‑level simulations to ensure design accuracy and performance for CPU and associated logic;
  • Execute all front‑end design tasks for CPU cores, including synthesis, STA, formal equivalence checking;
  • Support software‑hardware co‑design efforts, demonstrating a deep understanding of the SW‑HW system and its interaction with the CPU;
  • Drive the development of innovative CPU IP concepts based on high‑level product specifications, exploring new architectural paradigms;
  • Evaluate, customize, and integrate third‑party CPU IP or components (e.g., memory management units, interrupt controllers) to enhance system performance;
  • Work closely with analog design, verification to ensure seamless integration and cohesive project development for CPU‑centric designs.

Your experience includes:

  • 7+ years of experience in digital design, with a strong focus on CPU architecture and micro‑architecture development;
  • Demonstrable experience in designing and implementing RISC‑V based CPU cores (e.g., custom cores, modifications to open‑source cores);
  • Deep understanding of CPU pipeline stages, memory hierarchies (caches, MMU), interrupt handling, and bus interfaces related to CPU design;
  • Expertise in RTL coding (Verilog/System Verilog) and debugging for complex digital modules, particularly CPU designs;
  • Strong knowledge of SoC architecture and subsystem integration, specifically concerning CPU integration;
  • Proven experience in front‑end design tasks for CPU cores, including synthesis, STA, and formal equivalence checking;
  • Solid understanding of digital verification methodologies and working collaboratively with verification teams, with a focus on CPU verification;
  • Familiarity with common communication protocols (e.g., AMBA AXI/AHB) relevant to CPU‑to‑system interfaces.

What you need to succeed:

  • Strong problem‑solving skills with great attention to detail, particularly in the context of complex CPU architectures;
  • Excellent communication and collaboration abilities, particularly in cross‑functional team environments;
  • A proactive and self‑motivated attitude toward learning and innovation, especially in the evolving landscape of CPU design and RISC‑V.

We offer you:

At Innatera, you'll be part of a team shaping the future of AI hardware. Your work will help create solutions that power intelligent devices, improving industries and empowering everyday life, from consumer electronics to healthcare. Our culture of technical excellence, collaboration, and real‑world impact provides a unique opportunity to work alongside disruptive innovators, talented engineers, researchers and specialists.

To ensure your success and well‑being, we offer a comprehensive benefits package:

  • Competitive salary;
  • Pension plan;
  • Ambitious team with the freedom to innovate;
  • A flexible working environment (work‑from‑home policy, flexible working hours, advantageous holidays scheme). For this role you can work remotely OR from our Netherlands HQ;
  • An inclusive company culture that embraces open communication, diversity and supports holistic personal development;
  • Compensation for commuting to the office, fruits, drinks and snacks in the office.

Whether you’re passionate about microarchitecture, excited by verification or physical design, driven by supporting operations, building strong teams, or mastering the details of accounting, we’d love to hear from you!

Innatera is proud to be an equal‑opportunity employer. We welcome applicants of all backgrounds and experiences and are committed to building a diverse, inclusive, and respectful workplace. All qualified applicants will receive consideration for employment without regard to race, ethnicity, religion, gender, gender identity or expression, sexual orientation, disability, age, or other protected characteristics. If you require accommodations during the recruitment process, please let us know – we’re happy to support you.

Staff Digital Design Engineer - CPU Architecture & RISC-V employer: Innatera

Innatera is an exceptional employer, offering a dynamic work environment where innovation thrives and employees are empowered to shape the future of AI hardware. With a strong focus on collaboration and technical excellence, team members enjoy flexible working arrangements, a comprehensive benefits package, and ample opportunities for personal and professional growth in the rapidly evolving semiconductor industry. Located in the Netherlands, Innatera fosters an inclusive culture that values diversity and supports holistic development, making it an ideal place for passionate engineers to make a meaningful impact.
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Contact Detail:

Innatera Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Staff Digital Design Engineer - CPU Architecture & RISC-V

✨Tip Number 1

Network like a pro! Reach out to folks in the industry, attend meetups, and connect with people on LinkedIn. You never know who might have the inside scoop on job openings or can put in a good word for you.

✨Tip Number 2

Show off your skills! Create a portfolio showcasing your projects, especially those related to CPU architecture and RISC-V. This will give potential employers a taste of what you can do and set you apart from the crowd.

✨Tip Number 3

Prepare for interviews by brushing up on technical questions related to digital design and CPU architecture. Practice explaining your thought process clearly, as communication is key in collaborative environments.

✨Tip Number 4

Don’t forget to apply through our website! It’s the best way to ensure your application gets seen. Plus, it shows you’re genuinely interested in joining our team at Innatera.

We think you need these skills to ace Staff Digital Design Engineer - CPU Architecture & RISC-V

RISC-V Architecture
CPU Design
Micro-architecture Development
RTL Coding (Verilog/System Verilog)
SoC Integration
Digital Verification Methodologies
Memory Hierarchies
Problem-Solving Skills
Attention to Detail
Communication Skills
Collaboration Abilities
Synthesis
Static Timing Analysis (STA)
Formal Equivalence Checking
Familiarity with Communication Protocols (AMBA AXI/AHB)

Some tips for your application 🫡

Tailor Your CV: Make sure your CV is tailored to highlight your experience with CPU architecture and RISC-V. We want to see how your skills align with the role, so don’t be shy about showcasing relevant projects or achievements!

Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you’re excited about the role at Innatera and how your background makes you a perfect fit. We love seeing genuine enthusiasm for what we do.

Showcase Your Technical Skills: When detailing your experience, focus on your technical skills in RTL coding and SoC integration. We’re looking for specifics, so mention the tools and methodologies you’ve used, especially if they relate to RISC-V.

Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way to ensure your application gets into the right hands. Plus, it shows us you’re serious about joining our team!

How to prepare for a job interview at Innatera

✨Know Your RISC-V Inside Out

Make sure you brush up on your knowledge of RISC-V instruction sets and extensions. Be prepared to discuss how you've applied this knowledge in past projects, especially in CPU architecture and micro-architecture development.

✨Showcase Your Problem-Solving Skills

During the interview, highlight specific examples where you've tackled complex CPU design challenges. Use the STAR method (Situation, Task, Action, Result) to structure your responses and demonstrate your attention to detail.

✨Collaborate Like a Pro

Since this role involves working closely with verification and software teams, be ready to discuss your experience in cross-functional collaboration. Share examples of how you've effectively communicated and worked with different teams to achieve project goals.

✨Prepare for Technical Questions

Expect technical questions related to RTL coding, SoC architecture, and digital verification methodologies. Brush up on Verilog/System Verilog and be ready to explain your thought process when debugging complex digital modules.

Staff Digital Design Engineer - CPU Architecture & RISC-V
Innatera
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  • Staff Digital Design Engineer - CPU Architecture & RISC-V

    Full-Time
    48000 - 84000 ÂŁ / year (est.)
  • I

    Innatera

    50-100
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