Staff Digital Design Engineer in London

Staff Digital Design Engineer in London

London Full-Time 36000 - 60000 £ / year (est.) Home office (partial)
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At a Glance

  • Tasks: Design and implement cutting-edge digital IP blocks for neuromorphic processors.
  • Company: Join a fast-growing Dutch semiconductor company revolutionising AI technology.
  • Benefits: Enjoy competitive salary, flexible working hours, and generous holiday scheme.
  • Why this job: Make a real-world impact with innovative technology in a supportive team.
  • Qualifications: 6+ years in ASIC digital design and strong Verilog/SystemVerilog skills required.
  • Other info: Collaborative culture with opportunities for personal growth and mentoring.

The predicted salary is between 36000 - 60000 £ per year.

About Us: Innatera is a rapidly growing Dutch semiconductor company that develops ultra-efficient neuromorphic processors for AI at the edge. These microprocessors mimic the brain's mechanisms for processing fast data streams from sensors, enabling complex turn-key sensor analytics functionalities, with 10,000x higher performance per watt than competing solutions. Innatera's technology serves as a critical enabler for next-generation use cases in the IoT, wearable, embedded, and automotive domains. With over €37m in funding raised, we are scaling fast towards bringing our neuromorphic technology to billions of sensors by 2030. Our mission? To make the world smarter, safer, and greener.

We will trust you with:

  • Architecting, designing, and implementing digital IP blocks and subsystems for our neuromorphic SoCs.
  • Translating high-level product and algorithmic requirements into RTL-level specifications and microarchitectures.
  • Owning all front-end design activities, including RTL coding (SystemVerilog/Verilog), synthesis, STA, simulation, and design.
  • Collaborating closely with verification and backend engineers to align functionality, constraints, and design intent.
  • Defining and optimising PPA (Power, Performance, Area) goals across IPs and subsystems.
  • Developing design flows and automation scripts (Python/shell scripting) to improve productivity and consistency.
  • Applying low-power design techniques and contributing to overall SoC-level integration.
  • Writing and maintaining documentation, including IP specifications, design intent, and integration guides.
  • Mentoring junior engineers, contributing to code reviews, and fostering a culture of technical excellence and collaboration.

What you'll need to succeed:

  • 6+ years of hands-on ASIC digital design experience, owning complex IPs through the full lifecycle.
  • Strong expertise in front-end digital design, including Verilog/SystemVerilog RTL development and debugging.
  • Solid understanding of SoC architecture, bus interfaces, and IP integration flows.
  • Experience performing synthesis and static timing analysis (STA) and defining timing constraints.
  • Proven experience with Cadence tools and industry-standard EDA flows.
  • Strong understanding of low-power design techniques and PPA trade-offs.
  • Proficiency in Python and shell scripting for design flow development and automation.
  • Excellent documentation skills from drafting specifications to design intent and integration documentation.
  • Strong cross-functional collaboration mindset.
  • Excellent problem-solving and debugging abilities, with an analytical approach to complex design challenges.

Nice-to-haves:

  • Experience with FPGA prototyping (Vivado or similar).
  • Familiarity with DFT, synthesis, and STA flows.
  • Knowledge of communication protocols such as SPI, I2C, or AMBA.
  • Exposure to C/C++ for test or integration code.
  • Experience contributing to design methodology or flow development.
  • Prior experience mentoring or coaching junior engineers.

Why join Innatera?

  • At Innatera, you'll be part of a pioneering team building the next generation of brain-inspired processors for edge AI.
  • Your work will help bring groundbreaking technology to life, powering intelligent devices with real-world impact, from healthcare to consumer electronics.
  • Competitive salary.
  • Pension plan.
  • A flexible working environment (work-from-home policy, flexible working hours, advantageous holidays scheme).
  • A generous holiday scheme.
  • A collaborative, ambitious team with the freedom to innovate.
  • An inclusive culture that values openness, curiosity, and personal growth.
  • Office perks like fresh fruit, snacks, and an on-site gym.
  • Statutory commuting/home allowance.

Innatera is proud to be an equal opportunity employer. We welcome applicants of all backgrounds and experiences and are committed to building a diverse, inclusive, and respectful workplace. All qualified applicants will receive consideration for employment without regard to race, ethnicity, religion, gender, gender identity or expression, sexual orientation, disability, age, or other protected characteristics. If you require accommodations during the recruitment process let us know – we're happy to support you.

Staff Digital Design Engineer in London employer: Innatera Nanosystems

Innatera is an exceptional employer that fosters a culture of innovation and collaboration, making it an ideal place for a Staff Digital Design Engineer to thrive. With a flexible working environment, competitive salary, and generous holiday scheme, employees are empowered to balance their professional and personal lives while contributing to groundbreaking technology in the semiconductor industry. The company values diversity and inclusion, providing ample opportunities for growth and development within a supportive team dedicated to making a positive impact on the world.
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Contact Detail:

Innatera Nanosystems Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Staff Digital Design Engineer in London

✨Tip Number 1

Network like a pro! Reach out to folks in the semiconductor and AI space, especially those who work at Innatera. A friendly chat can open doors that a CV just can't.

✨Tip Number 2

Show off your skills! If you’ve got a portfolio or projects that highlight your digital design expertise, make sure to share them during interviews. It’s all about proving you can walk the walk.

✨Tip Number 3

Prepare for technical questions! Brush up on your Verilog/SystemVerilog knowledge and be ready to discuss your experience with ASIC design. We want to see how you tackle complex challenges.

✨Tip Number 4

Don’t forget to apply through our website! It’s the best way to ensure your application gets seen by the right people. Plus, it shows you’re genuinely interested in joining our team.

We think you need these skills to ace Staff Digital Design Engineer in London

Digital IP Design
RTL Development (SystemVerilog/Verilog)
Synthesis
Static Timing Analysis (STA)
SoC Architecture
IP Integration Flows
Cadence Tools
Low-Power Design Techniques
PPA Optimisation
Python Scripting
Shell Scripting
Documentation Skills
Cross-Functional Collaboration
Problem-Solving Skills
Debugging Abilities

Some tips for your application 🫡

Tailor Your Application: Make sure to customise your CV and cover letter to highlight your experience in ASIC digital design. We want to see how your skills align with our mission at Innatera, so don’t hold back on showcasing your relevant projects!

Show Off Your Technical Skills: When detailing your experience, be specific about your expertise in Verilog/SystemVerilog and any tools you've used. We love seeing concrete examples of how you've tackled complex design challenges, so let us know what you’ve achieved!

Keep It Clear and Concise: While we appreciate detail, clarity is key! Make sure your application is easy to read and free from jargon overload. We want to understand your journey and contributions without getting lost in technical terms.

Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it shows you’re keen to join our team at Innatera!

How to prepare for a job interview at Innatera Nanosystems

✨Know Your Stuff

Make sure you brush up on your ASIC digital design knowledge, especially around Verilog/SystemVerilog and SoC architecture. Be ready to discuss your past projects and how you've tackled complex design challenges.

✨Showcase Collaboration Skills

Innatera values teamwork, so be prepared to share examples of how you've worked with cross-functional teams. Highlight any experiences where you collaborated with verification or backend engineers to align on design intent.

✨Demonstrate Problem-Solving Abilities

Expect technical questions that test your analytical skills. Prepare to walk through your thought process when debugging or optimising designs, and don’t shy away from discussing any low-power design techniques you've applied.

✨Ask Insightful Questions

At the end of the interview, ask questions that show your interest in Innatera's mission and technology. Inquire about their approach to innovation or how they support the growth of their engineers, which will demonstrate your enthusiasm for being part of their team.

Staff Digital Design Engineer in London
Innatera Nanosystems
Location: London
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