Infoplus Technologies UK Limited is seeking experienced SoC Design Verification (DV) Engineers to verify a next-generation multi-die SoC using SystemVerilog/UVM. Strong debugging skills and C-based test development are essential as embedded cores are used for processor-driven verification.
Role involves subsystem- and SoC-level verification, regression execution, and collaboration with verification planning.
Senior SoC Verification Engineer — UVM & SystemVerilog in Cambridge employer: Infoplus Technologies UK Limited
As an SAP Finance Project Manager with us, you'll thrive in a dynamic work environment that values collaboration and innovation. Our London Pall Mall and Cambridge locations offer a vibrant culture, competitive benefits, and ample opportunities for professional growth, ensuring you can make a meaningful impact while advancing your career. Join us to be part of a team that prioritises employee development and fosters a supportive atmosphere.
Contact Details:
Infoplus Technologies UK Limited Recruitment Team
