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- Tasks: Lead verification strategies for cutting-edge ASIC projects across diverse industries.
- Company: Join a publicly listed company known for innovation in automotive, medical, and mobile tech.
- Benefits: Enjoy a competitive salary up to £95,000, bonuses, and share options.
- Why this job: Be part of a dynamic team tackling exciting challenges with real-world impact.
- Qualifications: 10+ years in verification engineering with expertise in Verilog and SystemVerilog required.
- Other info: Experience with ISO26262 and functional safety is a strong plus.
The predicted salary is between 57000 - 95000 £ per year.
I am seeking an experienced Principal Verification Engineer to join a publicly listed company designing industry leading ASIC, for customers ranging from start-ups to blue chip companies, in industries including automotive, medical, space and mobile technology.
Faced with a new project, you will have the ability to quickly decipher the verification challenge and help define an effective and pragmatic verification strategy.
10+ years’ experience in industry working on a variety of verification projects.
~ Strong experience in the specification and implementation of verification infrastructures, test benches, models, assertions, and functional tests in Verilog and SystemVerilog.
~ Familiarity with constrained random verification methodologies, code coverage analysis and running regression tests.
~ A good understanding of functional safety and quality processes, to achieve ISO26262 or similar will be considered as a strong plus.
On offer is a salary up to £95,000 (experience dependent) plus a bonus and company share options scheme.
Senior Engineer, Design Verification Engineering employer: IC Resources
Contact Detail:
IC Resources Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior Engineer, Design Verification Engineering
✨Tip Number 1
Make sure to showcase your extensive experience in verification projects during the interview. Be prepared to discuss specific challenges you've faced and how you successfully navigated them.
✨Tip Number 2
Familiarize yourself with the latest trends in ASIC design and verification methodologies. Being able to discuss current industry practices will demonstrate your commitment and expertise.
✨Tip Number 3
Highlight any experience you have with functional safety standards like ISO26262. This knowledge can set you apart from other candidates and show that you understand the importance of quality processes.
✨Tip Number 4
Prepare to discuss your experience with Verilog and SystemVerilog in detail. Be ready to explain how you've implemented verification infrastructures and test benches in past projects.
We think you need these skills to ace Senior Engineer, Design Verification Engineering
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your 10+ years of experience in verification projects. Emphasize your expertise in Verilog and SystemVerilog, as well as any relevant projects that showcase your ability to define effective verification strategies.
Craft a Strong Cover Letter: In your cover letter, explain why you are the perfect fit for this role. Discuss your experience with verification infrastructures and methodologies, and how they align with the company's needs. Mention your understanding of functional safety and quality processes, especially ISO26262.
Showcase Relevant Projects: Include specific examples of past projects where you successfully implemented verification strategies. Highlight any challenges you faced and how you overcame them, particularly in industries like automotive or medical technology.
Proofread Your Application: Before submitting, carefully proofread your application materials. Ensure there are no typos or grammatical errors, as attention to detail is crucial in engineering roles. A polished application reflects your professionalism and commitment.
How to prepare for a job interview at IC Resources
✨Showcase Your Experience
With over 10 years in the industry, be ready to discuss specific verification projects you've worked on. Highlight your role in defining verification strategies and how you tackled challenges in past projects.
✨Demonstrate Technical Proficiency
Be prepared to dive deep into your experience with Verilog and SystemVerilog. Discuss your familiarity with verification infrastructures, test benches, and methodologies like constrained random verification.
✨Understand Functional Safety
Since a good understanding of functional safety is a plus, brush up on ISO26262 and similar standards. Be ready to explain how you've integrated quality processes into your verification work.
✨Ask Insightful Questions
Prepare thoughtful questions about the company's current projects and their approach to verification challenges. This shows your genuine interest and helps you assess if the company aligns with your career goals.
