Senior Design Verification Engineer – SoC/IP Testbenches UK

Senior Design Verification Engineer – SoC/IP Testbenches UK

Full-Time 120000 - 120000 € / year (est.) No home office possible
IC Resources

At a Glance

  • Tasks: Design test plans and write UVM/SystemVerilog code for innovative hardware solutions.
  • Company: IC Resources, a leading company in hardware innovation.
  • Benefits: Competitive salary up to Β£120,000, share options, and performance-based bonuses.
  • Other info: Onsite roles available in Bristol or Cambridge with great career growth potential.
  • Why this job: Join a dynamic team and contribute to cutting-edge hardware projects.
  • Qualifications: 6+ years of experience in design verification and proficiency in Verilog/SystemVerilog.

The predicted salary is between 120000 - 120000 € per year.

IC Resources is expanding its hardware team in the UK and is looking for a Design Verification Engineer to contribute to innovative hardware solutions. You will design test plans, write UVM/SystemVerilog code, and collaborate with teams.

The role requires 6+ years of experience and proficiency in Verilog and SystemVerilog. A competitive salary of up to Β£120,000, share options, and a performance-based bonus are offered. Candidates must be based in the UK and willing to work onsite in Bristol or Cambridge.

Senior Design Verification Engineer – SoC/IP Testbenches UK employer: IC Resources

IC Resources is an excellent employer, offering a dynamic work culture that fosters innovation and collaboration among its hardware team in the UK. With competitive salaries, share options, and performance-based bonuses, employees are rewarded for their contributions while enjoying ample opportunities for professional growth in a vibrant tech hub like Bristol or Cambridge.

IC Resources

Contact Detail:

IC Resources Recruiting Team

StudySmarter Expert Advice🀫

We think this is how you could land Senior Design Verification Engineer – SoC/IP Testbenches UK

✨Tip Number 1

Network like a pro! Reach out to your connections in the industry, attend meetups, and engage with professionals on LinkedIn. You never know who might have the inside scoop on job openings or can refer you directly.

✨Tip Number 2

Show off your skills! Create a portfolio showcasing your best work in design verification, including any UVM/SystemVerilog projects. This will give potential employers a tangible sense of what you can bring to the table.

✨Tip Number 3

Prepare for interviews by brushing up on common technical questions related to SoC/IP testbenches. Practice explaining your thought process and problem-solving approach, as this will help you stand out during the interview.

✨Tip Number 4

Don’t forget to apply through our website! We’ve got loads of opportunities that might just be the perfect fit for you. Plus, applying directly shows your enthusiasm and commitment to joining our team.

We think you need these skills to ace Senior Design Verification Engineer – SoC/IP Testbenches UK

Design Verification
UVM
SystemVerilog
Verilog
Test Plan Design
Collaboration Skills
Hardware Solutions Development

Some tips for your application 🫑

Tailor Your CV:Make sure your CV highlights your experience with UVM/SystemVerilog and any relevant projects. We want to see how your skills align with the role, so don’t be shy about showcasing your achievements!

Craft a Compelling Cover Letter:Your cover letter is your chance to shine! Use it to explain why you’re passionate about design verification and how your background makes you a perfect fit for our team. Let us know what excites you about working with us at StudySmarter.

Showcase Your Collaboration Skills:Since this role involves teamwork, highlight any experiences where you’ve successfully collaborated with others. We love seeing candidates who can work well in a team environment, so share those stories!

Apply Through Our Website:We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it’s super easy – just a few clicks and you’re done!

How to prepare for a job interview at IC Resources

✨Know Your Stuff

Make sure you brush up on your Verilog and SystemVerilog skills. Be ready to discuss your past projects and how you've applied these languages in real-world scenarios. The more specific examples you can provide, the better!

✨Understand the Role

Familiarise yourself with the responsibilities of a Design Verification Engineer. Review the job description thoroughly and think about how your experience aligns with their needs. This will help you answer questions confidently and show that you're genuinely interested.

✨Prepare for Technical Questions

Expect technical questions related to UVM and test plans. Practice explaining your thought process when designing testbenches. You might even want to run through some sample problems or scenarios to keep your mind sharp.

✨Show Your Collaborative Spirit

Since collaboration is key in this role, be prepared to discuss how you've worked with teams in the past. Share examples of successful projects where teamwork made a difference. This will highlight your ability to fit into their culture and contribute effectively.