At a Glance
- Tasks: Design and verify high-performance digital datapath logic for advanced ASIC products.
- Company: Join a global leader in engineering based in Cambridge.
- Benefits: Competitive salary, bonuses, RSUs, and relocation support available.
- Other info: Opportunity for technical ownership and career growth in a dynamic environment.
- Why this job: Tackle challenging mathematical problems and lead innovative projects.
- Qualifications: Strong maths background and experience with Verilog/SystemVerilog required.
The predicted salary is between 80000 - 100000 £ per year.
I am seeking a Datapath Design Engineer to join a global company in their unique Engineering team based in Cambridge. This is a Principal/Staff level position and requires you to play a key role in the specification, design, and verification of high-performance digital datapath logic for advanced ASIC products and IP.
This role requires strong mathematical ability, a solid understanding of digital design fundamentals, and hands-on expertise in Verilog and SystemVerilog.
To be considered you must have:
- Strong background in mathematics (e.g. numerical methods, linear algebra, signal processing, or similar)
- Proven experience designing RTL using Verilog and SystemVerilog
- Solid understanding of synchronous digital design, timing, and clock-domain considerations
- Experience designing arithmetic-heavy or algorithmic datapaths
- Floating-point or APU experience
- Ability to reason about precision, overflow, rounding, and numerical accuracy
- Familiarity with ASIC design flows from RTL through synthesis
- Any Verification skills would be highly advantageous
This role focuses on building new designs rather than maintaining legacy implementations, with opportunities to take technical ownership and lead projects. You will work on intellectually challenging, mathematics-driven problems and deliver new designs you can genuinely call your own.
As a top company you can expect a great benefits package which includes base, bonus and RSUs. Visa sponsorship can be given and relocation support can be provided if you are a technical match. This role is very specific, so please ensure you have relevant experience before applying.
Principal Datapath Engineer employer: IC Resources
Join a leading global company in Cambridge as a Principal Datapath Engineer, where you will be part of an innovative Engineering team dedicated to creating cutting-edge designs. With a strong emphasis on employee growth and a collaborative work culture, you will have the opportunity to take technical ownership of projects while enjoying a competitive benefits package that includes base salary, bonuses, and RSUs. This role not only offers intellectually stimulating challenges but also provides relocation support and visa sponsorship for the right candidates, making it an excellent choice for those seeking meaningful and rewarding employment.
StudySmarter Expert Advice🤫
We think this is how you could land Principal Datapath Engineer
✨Tip Number 1
Network like a pro! Reach out to current employees in the company or industry on LinkedIn. A friendly chat can give you insider info and might even lead to a referral, which can seriously boost your chances.
✨Tip Number 2
Prepare for technical interviews by brushing up on your Verilog and SystemVerilog skills. Practice coding problems related to digital design and be ready to discuss your past projects in detail. We want to see your thought process!
✨Tip Number 3
Showcase your passion for mathematics and digital design during interviews. Share examples of how you've tackled complex problems in previous roles. This will help us see your fit for the role and your enthusiasm for the work.
✨Tip Number 4
Don’t forget to apply through our website! It’s the best way to ensure your application gets seen by the right people. Plus, it shows you’re genuinely interested in joining our team.
We think you need these skills to ace Principal Datapath Engineer
Some tips for your application 🫡
Show Off Your Skills:Make sure to highlight your strong mathematical background and experience with Verilog and SystemVerilog. We want to see how your skills align with the role, so don’t hold back on showcasing your expertise in digital design fundamentals!
Tailor Your Application:Take a moment to customise your application for this specific role. Mention your experience with arithmetic-heavy datapaths and any verification skills you have. This helps us see that you’re not just applying randomly but are genuinely interested in this position.
Be Clear and Concise:When writing your application, keep it clear and to the point. We appreciate well-structured applications that make it easy for us to understand your qualifications and experiences. Avoid jargon unless it’s relevant to the role!
Apply Through Our Website:Don’t forget to apply through our website! It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it makes the whole process smoother for both of us!
How to prepare for a job interview at IC Resources
✨Know Your Maths
Brush up on your mathematical skills, especially in areas like numerical methods and linear algebra. Be ready to discuss how these concepts apply to your previous projects, particularly in relation to designing arithmetic-heavy datapaths.
✨Showcase Your Verilog Skills
Prepare to demonstrate your expertise in Verilog and SystemVerilog. Bring examples of your past work where you designed RTL, and be ready to explain your design choices and the challenges you faced during implementation.
✨Understand Digital Design Fundamentals
Make sure you have a solid grasp of synchronous digital design principles, timing, and clock-domain considerations. Be prepared to answer technical questions that test your understanding of these fundamentals.
✨Highlight Your Verification Experience
If you have any verification skills, don’t hold back! Discuss how you've applied these skills in past projects, as they can set you apart from other candidates. Even if it's not a primary focus of the role, showing this knowledge can be a big plus.