Principal ASIC Design Engineer in Peterborough

Our client is a leading British technology company known for designing innovative computing platforms used by millions of developers, educators, engineers, and hobbyists worldwide. The company focuses on accessible, high-performance computing and is expanding its in-house ASIC capability to support an exciting product roadmap.

This role suits someone who works autonomously within a collaborative team and enjoys ownership. The leadership team and working culture are strong.

The Opportunity

As part of a growing ASIC team, you will contribute to the development of next-generation silicon products. Working within a small, highly collaborative group, you will gain exposure across the complete silicon development lifecycle, from architecture and specification through design, verification, implementation, test, and product qualification. This role is for an experienced IC Design Engineer who takes ownership, works across multiple disciplines, and contributes directly to the successful delivery of innovative silicon products.

Responsibilities

• Take ownership of front-end development activities, from specification through design, verification, and implementation
• Define, specify, configure, and integrate IP and system-level functionality
• Drive verification planning and execution across complex SoC and MCU designs
• Collaborate closely with software teams to ensure seamless hardware/software integration
• Support FPGA platforms used for software development and pre-silicon validation
• Work alongside implementation teams to resolve timing, power, and physical design challenges
• Contribute across the wider ASIC development flow to ensure successful product delivery

Qualifications

• Typically 10+ years' experience in SoC or MCU architecture and design
• Proven experience delivering at least one successful silicon tape-out where you held architectural ownership of a complete chip or significant subsystem
• Deep understanding of modern microcontroller and processor architectures, including:
• Real-time operation and deterministic interrupt handling
• Low-power architectures
• Flash and SRAM hierarchies
• Common peripheral interfaces such as SPI, I²C, UART, USB, ADC/DAC, timers, and programmable I/O fabrics
• Strong knowledge of broader SoC architecture, including:
• AXI, AHB, and APB interconnects
• Cache hierarchies
• DMA and memory controllers
• Security architectures
• Integration of operating system-class subsystems alongside real-time domains
• A strong appreciation of the practical realities of chip implementation, including RTL design (SystemVerilog), verification methodologies (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis, and physical design constraints
• Familiarity with scripting languages such as Bash, Python, or Tcl

This role is based in Cambridge and requires full-time onsite attendance. The opportunity offers a competitive compensation package and a range of non-monetary benefits.