At a Glance
- Tasks: Verify cutting-edge cryptographic designs and develop innovative verification tools.
- Company: Fast-growing startup at the forefront of post-quantum cryptography.
- Benefits: Competitive salary, share options, fully remote work, and visa sponsorship available.
- Why this job: Join a mission-driven team and make a global impact in security technology.
- Qualifications: Strong UVM verification background, Python proficiency, and 4+ years experience required.
- Other info: Collaborative environment with opportunities to mentor and grow your skills.
The predicted salary is between 48000 - 72000 £ per year.
Senior Verification Engineer
UK Remote
I am seeking a Senior Verification Engineer to join an established and fast-growing startup as it enters its next phase of growth. With a team of nearly 100 people, this company is at the forefront of post-quantum cryptography , developing security-critical technologies with global impact.
You will play a key role in verifying highly secure designs, working closely with experienced engineers in a collaborative, high-trust environment.
What you’ll be doing
As part of the verification team, you will:
- Build and extend UVM testbenches to verify cryptographic IP and subsystem designs
- Develop Python-based tools and automation to improve verification efficiency and productivity
- Apply formal verification techniques in creative and effective ways
Beyond hands-on verification, you will also:
- Influence and define verification methodologies and strategies
- Architect testbenches using UVM and formal-based approaches
- Define verification plans, functional coverage models, and test strategies at block and subsystem level
- Lead verification for IPs or subsystems, including effort estimation, scheduling, task allocation, and progress reporting
- Drive coverage closure and sign-off quality across complex designs
- Mentor junior engineers and help raise the overall capability of the team
Required experience
Must have:
- Strong background in UVM-based verification at IP and subsystem levels
- Proven experience building UVM testbenches from scratch
- Proficiency in Python for verification automation
- Solid experience with SystemVerilog Assertions (SVA)
- A minimum of 4 years experience.
What’s on offer
- Competitive base salary plus share options
- Opportunity to help build something from the ground up in a growing, mission-driven company
- Fully remote role (must be based at a UK address)
- Visa sponsorship available
This role will suit someone who thrives in small, collaborative teams , communicates clearly, and is passionate about delivering high-quality verification for security-critical systems.
Contact Detail:
IC Resources Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Design Verification Engineer
✨Tip Number 1
Network like a pro! Reach out to folks in the industry, attend virtual meetups, and connect with current employees at companies you're interested in. A friendly chat can sometimes lead to job opportunities that aren't even advertised.
✨Tip Number 2
Show off your skills! Create a portfolio or GitHub repository showcasing your UVM testbenches and Python tools. This gives potential employers a tangible look at what you can do and sets you apart from the crowd.
✨Tip Number 3
Prepare for interviews by brushing up on your technical knowledge and soft skills. Practice explaining your verification methodologies and how you've tackled challenges in past projects. Confidence is key!
✨Tip Number 4
Don't forget to apply through our website! We love seeing applications directly from candidates who are excited about joining our mission-driven team. Plus, it shows you're genuinely interested in being part of our journey.
We think you need these skills to ace Design Verification Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience with UVM-based verification and Python automation. We want to see how your skills align with the role, so don’t be shy about showcasing relevant projects!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Tell us why you’re passionate about verification and how you can contribute to our mission in post-quantum cryptography. Keep it engaging and personal.
Showcase Your Problem-Solving Skills: In your application, give examples of how you've tackled challenges in verification. We love seeing creative solutions, especially when it comes to formal verification techniques and testbench architecture.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you don’t miss out on any important updates from our team!
How to prepare for a job interview at IC Resources
✨Know Your UVM Inside Out
Make sure you brush up on your UVM knowledge before the interview. Be ready to discuss your experience building UVM testbenches from scratch and how you've applied them in previous projects. This will show that you’re not just familiar with the concepts but have practical experience too.
✨Show Off Your Python Skills
Since Python-based tools and automation are key for this role, prepare to talk about specific projects where you've used Python to improve verification efficiency. Bring examples of scripts or tools you've developed, and be ready to explain how they made a difference in your workflow.
✨Discuss Formal Verification Techniques
Be prepared to dive into formal verification techniques during your interview. Think of creative ways you've applied these methods in past roles and how they contributed to the success of your projects. This will demonstrate your ability to think critically and innovatively.
✨Emphasise Team Collaboration
This role is all about working closely with others, so highlight your experience in collaborative environments. Share examples of how you've mentored junior engineers or influenced verification methodologies, showcasing your leadership skills and commitment to team success.