At a Glance
- Tasks: Join a start-up to verify cutting-edge hardware security features using innovative technology.
- Company: Exciting stealth mode start-up with strong funding and expert leadership.
- Benefits: Competitive salary, remote work options, and opportunities for professional growth.
- Why this job: Be part of a team making breakthroughs in security technology and shaping the future.
- Qualifications: Degree in Electrical or Computer Engineering and experience with hardware verification methodologies.
- Other info: Collaborative environment with a focus on innovation and career advancement.
The predicted salary is between 36000 - 60000 £ per year.
Join a world-class semiconductor powerhouse and play a key role in cutting-edge ASIC development.
If you are interested in applying for this job, please make sure you meet the following requirements as listed below.
I am looking for a Senior Design Verification Engineer to join a dynamic hardware development team in Edinburgh. In this role, you\’ll be responsible for ensuring the functional correctness and robustness of complex digital and mixed-signal ASIC designs using advanced verification methodologies.
Key responsibilities
- Develop and execute comprehensive verification plans for complex mixed-signal ASIC designs
- Create and maintain UVM-based SystemVerilog testbenches.
- Write, debug, and execute test cases to verify functionality, performance, and corner cases
- Perform block-level and full-chip verification, including simulation, coverage analysis, and regression management
- Collaborate closely with design engineers to interpret specifications and define verification requirements
- Analyse and resolve issues discovered during verification and post-silicon validation
- Mentor junior engineers and drive improvements in verification methodologies and infrastructure
- Participate in code reviews and contribute to continuous improvement of design and verification best practices
Qualifications
- 5+ years\’ experience in digital and/or mixed-signal design verification
- Strong proficiency in SystemVerilog, UVM, and leading simulation tools (e.g., Synopsys VCS, Cadence Xcelium)
- Solid understanding of digital design principles, RTL design, and ASIC development flows
- Experience with scripting languages (Python, Perl, Shell, etc.)
- Familiarity with formal verification, assertion-based verification, and coverage-driven verification techniques
- Excellent problem-solving skills and attention to detail
xwzovoh
What\’s on offer
- Competitive base salary plus RSUs and annual bonus
- A collaborative, innovative working environment
- Flexible work options – remote work may be considered for UK-based engineers with full right to work in the UK
Design Verification Engineer employer: IC Resources
Contact Detail:
IC Resources Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Design Verification Engineer
✨Tip Number 1
Network like a pro! Reach out to folks in the industry on LinkedIn or at local meetups. We all know that sometimes it’s not just what you know, but who you know that can help you land that dream job.
✨Tip Number 2
Prepare for those interviews by brushing up on your technical skills and understanding the latest trends in hardware verification. We recommend doing mock interviews with friends or using online platforms to get comfortable with the process.
✨Tip Number 3
Showcase your projects! If you've worked on any relevant projects or have a portfolio, make sure to highlight them during interviews. We love seeing practical examples of your skills in action.
✨Tip Number 4
Don’t forget to apply through our website! It’s the best way to ensure your application gets seen by the right people. Plus, we’re always looking for passionate individuals to join our team!
We think you need these skills to ace Design Verification Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Design Verification Engineer role. Highlight your experience with UVM and any relevant projects that showcase your understanding of hardware verification methodologies. We want to see how your skills align with our needs!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about security features and how your background makes you a great fit for our team. Keep it concise but engaging – we love a good story!
Show Off Your Communication Skills: Since collaboration is key in our work environment, make sure to highlight your communication skills in your application. Share examples of how you've worked effectively in multidisciplinary teams – we want to know how you connect with others!
Apply Through Our Website: We encourage you to apply through our website for a smoother process. It helps us keep track of applications and ensures you get all the updates directly from us. Plus, it shows you're keen on joining our awesome team!
How to prepare for a job interview at IC Resources
✨Know Your Tech
Make sure you brush up on your knowledge of CHERI technology and RISC-V cores. Understanding these concepts will not only help you answer technical questions but also show your genuine interest in the role and the company's innovative products.
✨Master UVM Methodology
Since the job requires experience with UVM, be prepared to discuss your previous projects where you've used this methodology. Bring examples of how you've developed verification plans or testbenches, as this will demonstrate your hands-on experience and problem-solving skills.
✨Collaborative Mindset
This role involves working closely with cross-functional teams, so highlight your teamwork skills. Share specific instances where you've successfully collaborated with others to achieve a common goal, especially in a multidisciplinary environment.
✨Communicate Clearly
Excellent communication is key in this position. Practice explaining complex technical concepts in simple terms, as you may need to convey your findings to non-technical team members. This will showcase your ability to bridge the gap between technical and non-technical stakeholders.