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- Tasks: Own verification strategy for cutting-edge quantum computing designs and develop innovative testbenches.
- Company: Rapidly growing tech company in Cambridge with a focus on quantum technology.
- Benefits: Competitive salary, bonus, hybrid work, and extensive benefits package.
- Why this job: Join a world-class team and learn about quantum computing while making a real impact.
- Qualifications: Experience in SystemVerilog, UVM, and functional verification; programming skills in C, C++, or Python.
- Other info: Dynamic environment with opportunities for professional growth and learning.
The predicted salary is between 78000 - 102000 £ per year.
Cambridge, UK | Full-time | Permanent | Hybrid
£90,000 to £115,000 (DOE) + Bonus + Benefits
The salary range for this role is broad, as they are able to consider varying levels of experience. I am seeking a Staff Verification Engineer to join a rapidly growing HW Team in Cambridge. You will get the opportunity to work on cutting edge technology and in the area of quantum computing. No prior experience in quantum computing? No problem. You’ll learn as you go while working alongside world-class engineers in a truly cross-disciplinary environment.
As a Staff Verification Engineer, you will take ownership of verification across block, subsystem, and multi-FPGA system-level designs. With visibility across the entire stack, you will partner closely with the Lead Verification Engineer to define and deliver the verification strategy.
As a key member of the verification team, you will:
- Own the strategy and execution for block-level, subsystem, and multi-FPGA system designs.
- Develop scalable UVM-based testbenches that push boundaries.
- Drive verification efforts with a sharp focus on risk, coverage, and system-level behaviour.
- Strong hands-on expertise in SystemVerilog and UVM.
- Proven ability to debug across RTL, simulation, and hardware.
- Ability to work effectively with ambiguity and changing requirements.
- Demonstrable commercial experience in functional verification, including ownership of verification planning and strategy.
- Exposure to different programming languages, such as C, C++ and Python.
Contact For more information contact Rachel Mason at IC Resources.
Staff Verification Engineer in Cambridge employer: IC Resources
Contact Detail:
IC Resources Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Staff Verification Engineer in Cambridge
✨Tip Number 1
Network like a pro! Reach out to current employees in the company or industry on LinkedIn. A friendly chat can give you insider info and might even lead to a referral, which is always a bonus!
✨Tip Number 2
Prepare for the interview by brushing up on your SystemVerilog and UVM skills. We recommend doing some mock interviews with friends or using online platforms to get comfortable discussing your technical expertise.
✨Tip Number 3
Showcase your problem-solving skills! During interviews, be ready to discuss how you've tackled challenges in past projects. Use specific examples that highlight your ability to work with ambiguity and changing requirements.
✨Tip Number 4
Don’t forget to apply through our website! It’s the best way to ensure your application gets seen by the right people. Plus, it shows you’re genuinely interested in joining the team.
We think you need these skills to ace Staff Verification Engineer in Cambridge
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Staff Verification Engineer role. Highlight your experience with SystemVerilog, UVM, and any relevant programming languages like C or Python. We want to see how your skills match up with what we're looking for!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're excited about working in quantum computing and how your background makes you a great fit for our team. Let us know what drives you and how you can contribute to our success.
Showcase Your Problem-Solving Skills: In your application, don’t forget to mention specific examples where you've tackled complex verification challenges. We love seeing how you approach ambiguity and changing requirements, so share those stories with us!
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it shows us you’re keen on joining our team at StudySmarter!
How to prepare for a job interview at IC Resources
✨Know Your Stuff
Make sure you brush up on SystemVerilog and UVM before the interview. Be ready to discuss your hands-on experience and any projects you've worked on that involved verification strategies. This will show that you're not just familiar with the concepts but can apply them in real-world scenarios.
✨Showcase Your Problem-Solving Skills
Prepare to talk about specific challenges you've faced in previous roles, especially around debugging and verification planning. Use the STAR method (Situation, Task, Action, Result) to structure your answers, so you can clearly demonstrate how you tackled complex issues.
✨Embrace Ambiguity
Since the role involves working with changing requirements, be ready to discuss how you've successfully navigated ambiguity in past projects. Share examples of how you adapted your verification strategies when faced with unexpected challenges or shifting priorities.
✨Ask Insightful Questions
Prepare thoughtful questions about the team dynamics, the verification strategy, and the technologies they are using, especially in quantum computing. This shows your genuine interest in the role and helps you assess if the company is the right fit for you.
