IC Resources in Cambridge is seeking a Senior IC Layout Engineer to own the custom layout and verification of analog circuits, blocks, and IP for multi-Gigabit SerDes and memory IO. The role offers hybrid working with 3 days in the office.
You will lead chip layout activities and benefit from opportunities for career progression, with experience in high-speed designs valued. Tools include Cadence Virtuoso, Spectre/HSpice and Calibre across advanced nodes.
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Senior IC Layout Engineer (Hybrid) – High-Speed Analog IP in Cambridge employer: IC Resources
Join a forward-thinking semiconductor company that values innovation and excellence in digital design. With a strong emphasis on mentorship and professional growth, you'll thrive in a collaborative environment where your leadership will directly impact the success of complex ASIC/FPGA projects. Located in a vibrant tech hub, this role offers unique opportunities to shape methodologies and drive cutting-edge solutions while enjoying a supportive work culture that prioritises employee development.
