At a Glance
- Tasks: Verify cutting-edge designs and develop new test cases for complex protocols.
- Company: Join a leading tech firm focused on innovation and collaboration.
- Benefits: Attractive salary, flexible working options, and opportunities for skill development.
- Other info: Dynamic team environment with great potential for career advancement.
- Why this job: Be at the forefront of technology and contribute to groundbreaking projects.
- Qualifications: Experience with UVM/SV and complex HPC protocols like PCIe and DDR.
The predicted salary is between 50000 - 65000 € per year.
My client has an urgent request for a number of design verification.
Prerequisites:
- This is for individual contributor (IC) role.
- Solid background on UVM/SV.
- Experience in any of the complex HPC protocols (PCIe/DDR/LPDDR/Ethernet).
- Knowledge on the usage of protocol VIPs.
- Ability to define and write new test cases from scratch.
- Working as part of a team but with autonomous debug capability.
Job Description:
- For PCIe Controller verification, DDR/LPDDR Controller verification, UAL Controller verification and AMBA Peripheral Verification.
- Looking for solid background on UVM/SV.
- Protocols: PCIe (gen7 etc), CXL, High Speed Ethernet, DDR/LPDDR.
- Experience in complex HPC protocols, using protocol VIPs.
- Ability to define and write new test cases, working as part of a team but with autonomous debug capability.
Tools: Synopsys simulators/flow.
Design Verification Engineer in Crawley employer: iBSC
As a Design Verification Engineer with us, you'll join a dynamic team that values innovation and collaboration in a cutting-edge environment. We offer competitive benefits, a supportive work culture that encourages professional growth, and opportunities to work on complex projects involving the latest technologies. Our location provides a vibrant atmosphere that fosters creativity and teamwork, making it an ideal place for those seeking meaningful and rewarding employment.
StudySmarter Expert Advice🤫
We think this is how you could land Design Verification Engineer in Crawley
✨Tip Number 1
Network like a pro! Reach out to folks in the industry, especially those who work with UVM/SV or complex HPC protocols. A friendly chat can lead to opportunities that aren’t even advertised yet.
✨Tip Number 2
Show off your skills! Create a portfolio showcasing your experience with PCIe, DDR/LPDDR, and other relevant protocols. This can really set you apart when you’re chatting with potential employers.
✨Tip Number 3
Practice makes perfect! Brush up on defining and writing test cases from scratch. You might even want to simulate some scenarios using Synopsys tools to demonstrate your hands-on expertise.
✨Tip Number 4
Don’t forget to apply through our website! We’ve got loads of opportunities waiting for talented Design Verification Engineers like you. It’s a great way to get noticed by the right people.
We think you need these skills to ace Design Verification Engineer in Crawley
Some tips for your application 🫡
Tailor Your CV:Make sure your CV highlights your experience with UVM/SV and complex HPC protocols like PCIe and DDR. We want to see how your skills match the role, so don’t be shy about showcasing relevant projects!
Craft a Compelling Cover Letter:Your cover letter is your chance to shine! Use it to explain why you’re passionate about design verification and how your background makes you a perfect fit for our team. Let us know what excites you about the role!
Showcase Your Problem-Solving Skills:In your application, highlight instances where you've autonomously debugged issues or defined new test cases from scratch. We love seeing candidates who can think on their feet and tackle challenges head-on!
Apply Through Our Website:We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you don’t miss out on any important updates. Plus, we love seeing applications come in through our own channels!
How to prepare for a job interview at iBSC
✨Know Your Protocols
Make sure you brush up on your knowledge of complex HPC protocols like PCIe, DDR, and Ethernet. Be ready to discuss specific projects where you've used these protocols, as well as any challenges you faced and how you overcame them.
✨Showcase Your UVM/SV Skills
Since a solid background in UVM and SystemVerilog is crucial, prepare to demonstrate your understanding. Bring examples of test cases you've defined and written from scratch, and be ready to explain your thought process behind them.
✨Team Player with Autonomy
While this role requires teamwork, it’s also about being able to debug autonomously. Think of instances where you’ve successfully collaborated with others but also taken the lead on debugging tasks. Share these experiences during your interview.
✨Familiarise Yourself with Tools
Get comfortable with Synopsys simulators and flows, as they are likely to come up in conversation. If you have experience with these tools, be prepared to discuss how you’ve used them in past projects and any tips you might have for optimising their use.
