Overview
In this role you will verify RTL implementations to ensure designs meet standards before deployment. You will work within a growing electronics team to validate FPGA designs, using SystemVerilog and UVM to identify issues early. The position offers a clear impact on product quality as the company expands to meet client demands, with strong relocation support. You will collaborate with cross-functional teams to drive robust verification processes and maintain high standards. This is an opportunity to shape verification practices in a fast-paced, client-focused environment.
Pay / Benefits
- relocation assistance
- excellent benefits package
Responsibilities
- Verify RTL implementations to ensure designs meet required standards prior to deployment
- Apply SystemVerilog and UVM techniques to create and execute verification plans
- Validate digital ASIC or FPGA designs through hands-on testing and debugging
- Collaborate with design and verification teams to improve RTL quality
- Utilize Linux scripting to support verification workflows
Key requirements
- 3+ years of hands-on UVM coding experience
- Experience verifying digital ASIC or FPGA designs
- Degree in Electronics Engineering or similar
- Understanding of RTL design principles
- Proficiency in Linux and scripting (Python, TCL or Bash)
- SystemVerilog
- UVM
- RTL design
- Linux
- Python
- TCL
FPGA Verification Engineer in Cambridge employer: Hexwired Recruitment
Hexwired is an exceptional employer, offering a dynamic work culture that fosters innovation and collaboration in the heart of London. With a strong focus on employee growth, they provide ample opportunities for professional development and a competitive benefits package, making it an ideal place for Data Analysts looking to make a meaningful impact in the software sector.
