DDR Hardware Validation & Debug Engineer

DDR Hardware Validation & Debug Engineer

Full-Time On-site
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Graphcore in Bristol, UK is seeking a Hardware Validation & Debug Engineer to validate memory subsystems and system interfaces for next‑generation AI compute platforms. You will own lab validation, investigate failures, tune LPDDR memory (incl.

LPDDR5), and coordinate root‑cause analysis with hardware and firmware teams. You will work with Architecture, Silicon, Firmware, PCB design and power teams to translate lab findings into actionable fixes, reporting progress with clear debugging

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DDR Hardware Validation & Debug Engineer employer: graphcore

Graphcore is an exceptional employer, offering a vibrant work culture that fosters continuous learning and innovation in the heart of London. With a commitment to inclusivity and employee well-being, we provide flexible working arrangements, comprehensive benefits including private medical insurance and generous parental leave, and opportunities for professional growth within a cutting-edge AI environment. Join us to be part of a transformative journey in AI technology, where your contributions will directly impact the future of intelligent computing.

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Contact Details:

graphcore Recruitment Team