Graphcore Bristol seeks a Silicon Logical Design Engineer to deliver high quality micro-architecture specifications and RTL for Graphcore chips. The role involves integrating IP into top-level SoCs, building robust environments, and performing SoC-level synthesis, linting, CDC/RDC and timing checks.
You will support verification and physical design teams, debug cross-hierarchy issues and push automation. Strong SystemVerilog/VHDL and Python/Tcl skills are required, with a collaborative,
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Silicon Logic Design Engineer: RTL & IP Integration in Bristol employer: graphcore
Graphcore is an exceptional employer, offering a vibrant work culture that fosters continuous learning and innovation in the heart of London. With a commitment to inclusivity and employee well-being, we provide flexible working arrangements, comprehensive benefits including private medical insurance and generous parental leave, and opportunities for professional growth within a cutting-edge AI environment. Join us to be part of a transformative journey in AI technology, where your contributions will directly impact the future of intelligent computing.
