Find a job 
Featured Companies 
Featured Universities 
For Companies At a Glance
- Tasks: Design and optimise high-performance IP on next-gen FPGA and Adaptive SoC platforms.
- Company: Leading tech client focused on engineering excellence and innovation.
- Benefits: Fully remote role with genuine technical ownership and a supportive culture.
- Why this job: Join a team pushing boundaries in technology and make a real impact.
- Qualifications: Strong SystemVerilog RTL skills and experience with 100Gb Ethernet, PCIe Gen5, and AXI.
- Other info: Modern development practices with Git, CI, and opportunities for growth.
The predicted salary is between 36000 - 60000 £ per year.
I’m getting in touch because I’m supporting a client who are pushing the boundaries of high-performance IP on next generation FPGA and Adaptive SoC platforms and your experience looks highly relevant.
They require someone with strong SystemVerilog RTL capability, confident across 100Gb Ethernet, PCIe Gen5 and AXI, and comfortable taking designs through to timing closure without fuss.
Vivado and Vitis are central to the toolflow, and there’s real value placed on engineers who streamline their work with Python or Tcl. Modern development practices are in place, Git and CI included.
The role is fully remote from the UK with genuine technical ownership and a culture that respects engineering excellence.
If this aligns even just slightly with what you’d consider for your next move, would you be open to a brief conversation?
Field-Programmable Gate Arrays Engineer employer: Gazelle Global
Contact Detail:
Gazelle Global Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Field-Programmable Gate Arrays Engineer
✨Tip Number 1
Network like a pro! Reach out to your connections in the FPGA and Adaptive SoC space. A quick chat can lead to opportunities that aren’t even advertised yet.
✨Tip Number 2
Show off your skills! If you’ve got projects or contributions on GitHub, make sure to highlight them. It’s a great way to demonstrate your SystemVerilog RTL capability and familiarity with modern development practices.
✨Tip Number 3
Prepare for the chat! Brush up on your knowledge of 100Gb Ethernet, PCIe Gen5, and AXI. Being able to discuss these topics confidently will show you’re the right fit for the role.
✨Tip Number 4
Don’t forget to apply through our website! We’re all about making the application process smooth and easy, so take advantage of it and get your foot in the door.
We think you need these skills to ace Field-Programmable Gate Arrays Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience with SystemVerilog RTL, 100Gb Ethernet, and PCIe Gen5. We want to see how your skills align with the role, so don’t be shy about showcasing your relevant projects!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you’re excited about working with FPGAs and Adaptive SoC platforms. Let us know how your background makes you a perfect fit for our team.
Show Off Your Tool Proficiency: Mention your experience with Vivado, Vitis, and any scripting languages like Python or Tcl. We love engineers who can streamline their work, so highlight any tools or practices that make your workflow smoother.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it’s super easy!
How to prepare for a job interview at Gazelle Global
✨Know Your Tech Inside Out
Make sure you brush up on your SystemVerilog RTL skills and be ready to discuss your experience with 100Gb Ethernet, PCIe Gen5, and AXI. Prepare specific examples of how you've taken designs through to timing closure, as this will show your technical prowess.
✨Familiarise Yourself with the Tools
Since Vivado and Vitis are central to the role, ensure you're comfortable discussing these tools. If you’ve used Python or Tcl to streamline your work, have some examples ready to share. This will demonstrate your ability to enhance efficiency in your projects.
✨Embrace Modern Development Practices
Be prepared to talk about your experience with Git and CI. Companies value engineers who can integrate modern practices into their workflow, so highlight any relevant projects where you’ve successfully implemented these tools.
✨Show Your Passion for Engineering Excellence
This role values genuine technical ownership and engineering excellence. Share your thoughts on what engineering excellence means to you and how you strive for it in your work. This will resonate well with the company culture.
