At a Glance
- Tasks: Lead a team in developing cutting-edge semiconductor test solutions for AI accelerator chips.
- Company: Fractile, a fast-growing tech company redefining AI with innovative silicon and software.
- Benefits: Full ownership of projects, collaborative culture, and rapid career growth opportunities.
- Other info: Work in modern offices with a focus on collaboration and problem-solving.
- Why this job: Join a dynamic team making a real impact in the AI industry with advanced technology.
- Qualifications: 8+ years in semiconductor test engineering and strong leadership skills required.
The predicted salary is between 60000 - 84000 £ per year.
Fractile is building silicon, systems and software which will redefine the frontier of AI: running the world’s most advanced models at radically higher speed and lower cost. We have an exceptional team across hardware and software capable of bringing about this change, and we are growing fast to meet demand and deliver our product at scale.
We are looking for a team leader for Semiconductor IC test engineering activities for an advanced AI accelerator chip program, including ownership of subcontracted test development, internal team leadership, and delivery of high-quality, high-volume-capable test solutions. The role spans test strategy, test architecture, vendor oversight, team management, and hands-on technical guidance across digital, memory, and high-speed interface domains.
Key Responsibilities
- Drive the manufacturing test strategy for an AI accelerator chip featuring PCIe Gen6, LPDDR, advanced CMOS nodes, and advanced packaging (e.g., 2.5D/3D, chiplet).
- Lead and manage a team of chip test engineers responsible for test planning, test program development, pattern bring-up, silicon characterization, debug, and optimization.
- Manage subcontracted test development partners (OSATs, ATE vendors, external engineering services). Includes scoping, technical oversight, schedule tracking, and quality control of deliverables.
- Define and drive test software architecture, DFT usage, and test pattern development strategies for high-speed logic, SRAM, DRAM, and High Speed IO blocks.
- Work closely with design, DFT, product engineering, packaging, and validation teams to ensure robust test coverage, manufacturability, and yield ramp success.
- Oversee test development for high speed interfaces such as PCIe Gen6 and multi-GHz LPDDR.
- Guide development of structural and functional test content (scan, MBIST, JTAG, HSIO tests, system-level tests).
- Lead silicon bring-up and development on ATE: correlation, failure analysis, shmooing, corner testing, stress testing, and yield improvement activities.
- Define KPIs and metrics for subcontractor performance, test coverage, yield, time-to-test, and cost optimization.
- Drive continuous improvement in test methodologies, automation, data analytics, and debug infrastructure.
- Ensure robust test flows for advanced packaging (thermals, interposer/bridge connections, TSV integrity, die-to-die IO testing).
- Support qualification, reliability testing, and high-volume manufacturing transfer.
Required Qualifications
- BS/MS/PhD in Electronics and Electrical Engineering or related field.
- 8+ years in semiconductor test engineering, including leadership or technical lead roles.
- Deep experience with ATE test development (e.g., Advantest 93K, Teradyne).
- Strong understanding of DFT (scan, ATPG, LBIST, MBIST), memory testing, and high-speed interface testing.
- Experience managing external test development partners or OSATs.
- Proven ability to lead and mentor test engineering teams.
- Solid background in advanced CMOS nodes and familiarity with advanced packaging test challenges.
- Expertise in silicon debug, characterization, and correlation across ATE and system-level environments.
- Ability to collaborate across design, architecture, product engineering, packaging, and operations.
Preferred Qualifications
- Experience with AI/ML accelerator chips or other high-performance compute ICs.
- Prior involvement with PCIe Gen5/Gen6 or LPDDR4/5/6 test methodologies.
- Familiarity with signal-integrity-aware test development and high-speed IO margining.
- Experience with chiplets, 2.5D/3D IC test flows, or heterogeneous integration.
How We Work
- Ownership and execution: you will have full agency to drive your work forward.
- Rapid iteration: we all work directly with top leadership to move from idea to hardware on ambitious timelines.
- Full-stack engagement: hardware, software, silicon, and modelling teams all work closely together to create a product with generational impact.
- Optimistic and pragmatic: we possess the will to win, and to do the hard work to get us there.
- Team player mentality: the mission is bigger than any of us, and we have the curiosity and technical focus to see the best idea shipped, no matter who’s it is.
About Us
- Founded in 2022, team of 70+, which is expanding rapidly.
- Modern, open offices in London and Bristol.
- Collaborative, problem-solving culture built on deep curiosity, entrepreneurial initiative and technical fluency.
Export control and security clearance
Certain roles may involve working on technologies subject to export restrictions. Applicants may be required to undergo additional eligibility checks to ensure compliance with applicable law.
Seniority level: Mid-Senior level
Employment type: Full-time
Job function: Engineering and Information Technology, Computer Hardware Manufacturing
Semiconductor Test Engineering Team Leader employer: Fractile
Fractile is an exceptional employer that fosters a culture of ownership and rapid iteration, allowing Infrastructure Engineers to drive their work forward while collaborating closely with top leadership. With competitive salaries, meaningful equity, and comprehensive benefits including private medical and a contributory pension, employees are well-supported in their professional growth. Located in a diverse and dynamic office environment, Fractile is committed to building an inclusive team that thrives on solving complex problems together.
StudySmarter Expert Advice🤫
We think this is how you could land Semiconductor Test Engineering Team Leader
✨Tip Number 1
Network like a pro! Reach out to folks in the semiconductor industry, especially those at Fractile. Attend events, join online forums, and don’t be shy about asking for informational interviews. You never know who might have the inside scoop on job openings!
✨Tip Number 2
Show off your skills! Prepare a portfolio or a presentation that highlights your past projects and achievements in semiconductor test engineering. This is your chance to demonstrate your expertise and how you can lead a team effectively.
✨Tip Number 3
Practice makes perfect! Get ready for interviews by doing mock sessions with friends or mentors. Focus on articulating your experience with ATE test development and team leadership, as these are key for the Semiconductor Test Engineering Team Leader role.
✨Tip Number 4
Apply through our website! It’s the best way to ensure your application gets seen. Plus, it shows you’re genuinely interested in joining Fractile and being part of our mission to redefine AI technology.
We think you need these skills to ace Semiconductor Test Engineering Team Leader
Some tips for your application 🫡
Tailor Your CV:Make sure your CV is tailored to the Semiconductor Test Engineering Team Leader role. Highlight your relevant experience in semiconductor test engineering, leadership roles, and any specific technologies mentioned in the job description.
Craft a Compelling Cover Letter:Your cover letter should tell us why you're the perfect fit for this position. Share your passion for AI and semiconductor technology, and how your background aligns with our mission at Fractile.
Showcase Your Achievements:Don’t just list your responsibilities; showcase your achievements! Use metrics and examples to demonstrate how you've driven success in previous roles, especially in test strategy and team management.
Apply Through Our Website:We encourage you to apply through our website for a smoother application process. It helps us keep track of your application and ensures you don’t miss out on any important updates from us!
How to prepare for a job interview at Fractile
✨Know Your Tech Inside Out
Make sure you brush up on your knowledge of semiconductor test engineering, especially around ATE test development and DFT methodologies. Be ready to discuss specific projects you've worked on, particularly those involving high-speed interfaces like PCIe Gen6 or advanced packaging techniques.
✨Show Leadership Skills
As a team leader, it's crucial to demonstrate your ability to manage and mentor a team. Prepare examples of how you've successfully led teams in the past, managed subcontractors, or driven test strategies. Highlight your collaborative approach and how you’ve worked with cross-functional teams.
✨Prepare for Technical Questions
Expect in-depth technical questions related to silicon debug, characterization, and correlation. Brush up on your understanding of memory testing and high-speed IO margining. Practise explaining complex concepts clearly, as this will showcase your expertise and communication skills.
✨Emphasise Continuous Improvement
Fractile values innovation and improvement, so be prepared to discuss how you've driven continuous improvement in your previous roles. Share specific examples of how you've implemented new methodologies, automation, or data analytics to enhance test processes and outcomes.
