Fractile seeks a senior hardware engineer to accelerate the clock speed of frontier AI inference by optimizing datapath RTL and PPA closure. You will own end-to-end optimization, from architectural trade-offs to timing-aware RTL, collaborating with PD and silicon teams to deliver measurable PPA gains on production silicon.
The role requires extensive experience with fixed/float/quantized arithmetic, low-power techniques, and hands-on use of synthesis and STA tools to close timing on critical
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Lead AI Accelerator PPA Engineer employer: Fractile
Fractile is an exceptional employer that fosters a collaborative and innovative work culture, where engineers are empowered to make impactful contributions in the rapidly evolving field of AI. With a strong focus on employee growth, we offer continuous learning opportunities and the chance to work alongside talented teams in a performance-driven environment. Located in a vibrant tech hub, our team enjoys not only competitive benefits but also the unique advantage of being at the forefront of technological advancements.
