Senior / Staff / Principal Analog Design Engineer - ADC/DAC

Flux Computing designs and manufactures optical processors to train and run inference on large AI models. Join us in London to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed.

The Role

We’re searching for a Senior/Staff/Principal Analog Design Engineer to architect, design and bring to production ultra‑high‑speed (>20GHz analog bandwidth, >40GS/s) CMOS ADCs and DACs that directly interface with our optical compute fabric. Success in this role requires mastery of low‑jitter sampling circuits, broadband front ends, and calibration techniques that deliver outstanding ENOB and power efficiency. The ideal candidate will have a strong background in electrical engineering and semiconductor physics, along with a passion for developing reliable, high-performance analogue circuits that drive breakthrough AI hardware.

Responsibilities

• Define converter architectures that will deliver on the target of Analog bandwidth >20GHz.
• Design critical high‑speed building blocks: bootstrapped or switch‑linearised T/H, low‑skew clock trees.
• Model and close performance using transistor‑level and behavioural co‑simulation (SpectreRF / AFS RF + Verilog‑A/AMS), then drive post‑layout extraction, EM/IR and thermal analysis to achieve first‑silicon success.
• Collaborate with packaging, SerDes and PLL teams to co‑design I/O impedance, ESD, supply isolation and on‑interposer routing so converters integrate cleanly into multi‑lane fabrics.
• Lead silicon bring‑up: on‑wafer static and dynamic tests, high‑speed digitiser / AWG measurements, DNL/INL, static‑power and jitter transfer characterisation; oversee production test pattern generation and built‑in self‑test (BIST) hooks.
• Mentor junior engineers, conduct rigorous design and layout reviews, and publish internal app‑notes to disseminate best practices for GHz‑class data‑converter design.
• Track and inject into the team the latest advances in time‑interleaving calibration, background mismatch correction, supply‑noise tolerant reference generation and layout techniques.

Skills & Experience

• 7+ years of production CMOS data‑converter design, with at least two tape‑outs running ≥20GHz analog bandwidth.
• Deep knowledge of track‑and‑hold linearity, aperture‑jitter minimisation, current‑steering DAC glitch energy reduction, capacitor and device matching, and metastability‑hard comparators.
• Proficiency with industry EDA flows: Cadence Virtuoso, SpectreRF / AFS RF, Verilog‑A/AMS, EMX / HFSS for package + on‑chip inductor modelling, and mixed‑signal verification.
• Demonstrated ability to achieve experience incorporating digital calibration engines (DSP or µ‑controller‑driven) for offset, gain, timing and element‑mismatch correction.
• Bachelor’s degree in Electrical Engineering or related field (Master’s / PhD preferred).
• Excellent communication, cross‑disciplinary collaboration, and a demonstrated ability to execute quickly in innovation‑driven environments.

Competitive salary: £135k+, depending on experience. Stock options in a rapidly growing AI company. Based in our new 5,000 sq. ft. office in the AI hub of Kings Cross, London. To foster collaboration in our high-growth environment, we require all employees to work from our London HQ and live within a 45-minute commute. We offer an extra £24,000/year incentive for those living within 20 minutes. Comprehensive healthcare insurance. Private access to our in-house 3D printer.

If you are passionate about pushing the boundaries of what’s possible in AI and thrive in a high-energy, fast-paced environment, we want to hear from you. Apply now to join Flux and be a key player in shaping the future of computing.