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- Tasks: Design and verify cutting-edge RF blocks in a dynamic engineering environment.
- Company: Leading tech firm in Farnborough, specialising in RFIC design.
- Benefits: Competitive salary, onsite work, and opportunities for professional growth.
- Why this job: Join a team of experts and innovate in the exciting field of RF technology.
- Qualifications: Bachelor's degree in Engineering and 5+ years of RFIC experience required.
- Other info: Collaborative culture with a focus on quality and timely delivery.
The predicted salary is between 60000 - 80000 £ per year.
Location: Farnborough, UK
Job Type: Full-time contract, 29th January 2027
Work Model: onsite
Summary: The senior engineer will take on the design of multiple RF blocks including RF buffers and LO blocks and also contribute to the verification of designs by performing full Rx chain verification simulations, reporting compliance to spec and validating device register controls for test.
The tasks will include:
- Review of block specifications.
- Schematic design, simulation and reporting compliance to specifications.
- Overseeing a layout engineer to complete the layout.
- Post-layout parasitic simulation and necessary adjustments.
- Documentation of usage and any calibrations etc.
- Liaising with the relevant technical lead to integrate the designs.
- Presentation of design for block-level reviews.
- Completing top level verification simulations.
Key Responsibilities:
- Acts as a key contributor in a complex environment.
- Responsible for delivering the fully verified blocks.
- Solves complex problems in a tightly constrained environment.
- Fully competent in Analogue design for complex sub-cells and small subsystems.
- Keeps abreast of new developments and is a technical expert in the design of analogue sub-cells.
- Ensures quality of the solution; works with macro lead to ensure timely delivery of subsystems.
Minimum Qualifications:
- Bachelor's degree in Science, Engineering, or related field.
Minimum Experience: Candidate should have:
- 5+ years of RFIC work experience.
- Design experience of Key RF IPs like LO buffers, RF test circuitry.
- Experience of verification simulations of complete transceiver chains RF -> Analogue.
- Good understanding of RFIC design.
- Experience with either Cadence or Mentor RF/Analogue IC design tools.
- Ability to coordinate with different team members and define the requirements.
- Experience in a relatively low geometry node (≤40nm) CMOS process.
Preferred Experience:
- Fully competent in RFIC design and verification techniques.
- Fully competent in the use of Cadence RF/analogue design and verification tools.
- Recent LO or RF buffer or RF test design experience.
- Good team player.
- Good interpersonal and communication skills.
Locations
Radio Frequency Design Engineer in Farnborough, Hampshire employer: eTeam
Contact Detail:
eTeam Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Radio Frequency Design Engineer in Farnborough, Hampshire
✨Tip Number 1
Network like a pro! Reach out to your connections in the RFIC field, attend industry events, and join relevant online forums. You never know who might have the inside scoop on job openings or can refer you directly.
✨Tip Number 2
Show off your skills! Create a portfolio showcasing your RF design projects, simulations, and any successful designs you've worked on. This will give potential employers a tangible sense of what you can bring to the table.
✨Tip Number 3
Prepare for interviews by brushing up on your technical knowledge and being ready to discuss your past projects in detail. Practice common interview questions related to RFIC design and be prepared to solve problems on the spot.
✨Tip Number 4
Don't forget to apply through our website! We often have exclusive listings that you won't find elsewhere. Plus, it shows you're genuinely interested in joining our team at StudySmarter.
We think you need these skills to ace Radio Frequency Design Engineer in Farnborough, Hampshire
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the RFIC design role. Highlight your experience with RF blocks, verification simulations, and any relevant tools like Cadence or Mentor. We want to see how your skills match up with what we're looking for!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about RFIC design and how your background makes you a perfect fit for our team. Keep it concise but engaging – we love a good story!
Showcase Your Projects: If you've worked on any relevant projects, make sure to mention them! Whether it's designing RF buffers or conducting verification simulations, we want to know what you've accomplished. Include specific examples to back up your claims.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the easiest way for us to receive your application and ensures you’re considered for the role. Plus, it shows us you’re keen to join the StudySmarter family!
How to prepare for a job interview at eTeam
✨Know Your RFIC Inside Out
Make sure you brush up on your knowledge of RFIC design and verification techniques. Be prepared to discuss your experience with key RF IPs like LO buffers and RF test circuitry, as well as your familiarity with Cadence or Mentor tools. This will show that you're not just a candidate, but a knowledgeable expert.
✨Showcase Your Problem-Solving Skills
During the interview, be ready to share examples of how you've tackled complex problems in tight environments. Think of specific instances where your analytical skills made a difference in your projects. This will demonstrate your ability to deliver fully verified blocks under pressure.
✨Communicate Effectively
Since this role requires liaising with various team members, practice articulating your thoughts clearly. Highlight your interpersonal skills and give examples of how you've successfully coordinated with others to define requirements and integrate designs. Good communication can set you apart!
✨Prepare for Technical Reviews
Expect to present your designs during block-level reviews. Prepare a concise presentation that outlines your design process, compliance to specifications, and any adjustments made during post-layout simulations. Being able to confidently present your work will impress the interviewers and show your readiness for the role.