Principal Digital Design Engineer

This role can be based in any of our offices - UK (Oxford, Bristol, Cambridge, Sheffield), Brazil (Campinas or Porto Alegre), India (Bangalore) or Hungary (Budapest). Established in 2001, EnSilica is a publicly listed company (LON:ENSI), designing industry leading, application specific integrated circuit chips (ASIC), for customers ranging from start-ups to blue chip companies, in industries including automotive, medical, space and mobile technology companies. EnSilica currently employs more than 200 people. As part of our ongoing expansion, EnSilica needs to strengthen our ASIC Digital Design team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

You will have a strong academic record, 10+ years experience in industry working on ASIC developments and IP design, with at least one successful project as Technical Lead. You will possess a broad understanding of the IC design flow, strong ‘hands-on’ technical skills together with excellent communication skills and a desire to work in a customer facing organisation.

Your Key Responsibilities

• Take full-flow ownership of all stages of the digital specification to RTL design flow, for complex ASIC blocks or full-chip.
• Work closely with our customers and other EnSilica teams to deliver projects on-time and to the required quality levels.
• Setup, run and maintain EDA tool flows, as needed, for each stage of the FE design flow.
• Keep up to date with all aspects of advanced ASIC FE design methodology and best-practice to ensure that EnSilica’s expertise and service quality are at their top for each customer project.

Your Key Skills and Experience

Essential

• 1st or 2.1 Electronics, Physics or relevant subject from a Tier 1 group University.
• 10+ years experience working in IC Development with a deep understanding of all aspects of ASIC FE design, from specification to RTL, and with a basic understanding of RTL to tape out flow.
• Specific expertise in the following technical areas:

• RTL Design (VHDL or Verilog).
• Functional verification – ideally a good knowledge of System Verilog and the use of techniques such as assertions and coverage driven verification.
• SoC knowledge – including the selection and integration of 3rd party IPs.
• Sound knowledge of SoC interconnect protocols, at least the Amba AHB plus one of the Amba AXI (AXI3, AXI4, AXI4-Lite, ACE, AXI5, AXI5-Lite).
• ASIC implementation skills (synthesis, DFT, timing closure).
• Experience to lead one complex IP design and/or full ASIC design, from specification to full RTL.

Desirable

• Knowledge of UPF syntax to describe power intent.
• Knowledge of chip level communication interfaces is a significant advantage (I2C, SPI, UART, eCPRI, PCIe).

About You

• Strong communication and presentation skills, which enable you to interface easily and effectively with cross-functional stakeholders in an international environment.
• You think holistically, are creative, and have a quick grasp, which enables you to maintain an overview in complex situations and make well-founded decisions.
• You are a problem-solver and work independently and with drive to achieve results.
• The ability to engage all members of a diverse team towards a shared objective.
• You have proven leadership abilities with strong team management skills, able to motivate, coach and develop team members.
• You are results-oriented with a strong sense of ownership and accountability.
• A team player, ideally with experience collaborating within the international, cross-functional environments.
• Adaptable and willing to embrace change.
• Happy to take ownership of issues and provide suitable solutions.

Position Specifics

This role is flexible, some UK and international travel required. You must have the right to live and work in the country you have applied for.