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- Tasks: Join a cutting-edge SoC team to develop ASICs and tackle innovative projects.
- Company: Leading semiconductor company with a focus on growth and collaboration.
- Benefits: Competitive salary, bonuses, hybrid working, and extensive training opportunities.
- Why this job: Work alongside industry experts and make a real impact in technology.
- Qualifications: Experience in digital ASIC design and formal verification is essential.
- Other info: Dynamic environment with excellent career growth and international collaboration.
The predicted salary is between 42000 - 91000 £ per year.
Due to our continued growth, our semiconductor client is looking for Formal Verification Engineers to join their cutting-edge SoC team in the development of ASICs. The successful candidates will be working with experts in different aspects of SoC development on state-of-the-art projects.
You will be given the opportunity to undertake role-specific training to further develop your knowledge, experience and career development. The successful candidates will be able to and open to learn other areas and specialisms outside ASIC Design and Verification from RTL Design, Formal Verification and DevOps.
The successful candidate will also be working directly for an industry-renowned Senior Director who has built and established many multi-discipline teams throughout their career and his teams have enjoyed major success. This team is going to be a pure multidiscipline team which can tackle any issue that comes their way and become some of the industry's most well-rounded engineers. This is a fantastic opportunity for an engineer with 5 to 15+ years’ experience in the industry.
Formal Verification Engineers Expected contributions:- Mentoring from principal & distinguished engineers.
- Opportunity to become a mentor to your colleagues.
- Understanding of different parts of the design & verification cycle.
- Experience working with leading edge EDA tools and process nodes using industry standard languages and methodologies (e.g. Systemverilog, UVM, Formal).
- Working on high volume data centre & enterprise products used by industry leading companies.
- Experience of working on projects with teams located internationally.
- Digital ASIC design and verification experience.
- Experience of Formal Verification (Jasper Gold or VC_Formal).
- Practical experience or desire to learn:
- Translating design requirements into RTL.
- Deriving functional requirements for verification.
- Systemverilog UVM test benches.
- Scripting languages & REST APIs (e.g. Perl/Python/TCL).
- Team player with good verbal and written communication skills.
- Experience using SV UVM 1800.2.
- Familiarity with C/C++.
- Experience with any of the following storage interfaces: SAS, PCIe, NVMe (preferred) or SATA.
- Competitive Salaries Ranging From £50,000 – £130,000 (Depending on Level and experience).
- 10%-20% Bonus (based on Company and individual performance).
- 25 days holiday + 8 days Bank Holiday per year.
- 3 Days a week on Site hybrid working.
- Pension (matched group pension up to 8%).
- Life Assurance.
- Income Protection.
- Private Medical.
- Employee Supported Volunteering.
- Employee Assistance Program for Health Well-being, Financial services, Legal services etc.
- Training and Development.
- Visa Sponsorship available.
- Relocation Support (if required).
My client can offer a 3-stage process consisting of a 1st stage Video Call, 2nd Stage Video Call and a 3rd Stage on-site Interview (meet the team and site tour). This process can be completed within 2-3 weeks (based on availability).
Formal Verification Engineer employer: Elite People Partners Ltd
Contact Detail:
Elite People Partners Ltd Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Formal Verification Engineer
✨Tip Number 1
Network like a pro! Reach out to your connections in the semiconductor industry, especially those who might know about opportunities in formal verification. A friendly chat can sometimes lead to job openings that aren't even advertised!
✨Tip Number 2
Prepare for those interviews! Brush up on your knowledge of ASIC design and verification, and be ready to discuss your experience with EDA tools. Practising common interview questions can help you feel more confident when it’s your turn to shine.
✨Tip Number 3
Show off your skills! If you have any projects or contributions related to formal verification, make sure to highlight them during interviews. Real-world examples can really set you apart from other candidates.
✨Tip Number 4
Don’t forget to apply through our website! We’ve got loads of opportunities waiting for talented engineers like you. Plus, applying directly can sometimes give you an edge in the hiring process.
We think you need these skills to ace Formal Verification Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Formal Verification Engineer role. Highlight your experience with ASIC design and verification, and don’t forget to mention any specific tools or languages you’ve worked with, like Systemverilog or UVM.
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about formal verification and how your background makes you a great fit for our team. Keep it concise but engaging!
Show Off Your Skills: In your application, be sure to showcase your skills in scripting languages and REST APIs. If you have experience with tools like Jasper Gold or VC_Formal, make that known! We love seeing candidates who are eager to learn and grow.
Apply Through Our Website: We encourage you to apply through our website for the best chance of getting noticed. It’s super easy, and you’ll be able to keep track of your application status. Plus, we can’t wait to see what you bring to the table!
How to prepare for a job interview at Elite People Partners Ltd
✨Know Your Stuff
Make sure you brush up on your knowledge of digital ASIC design and verification. Familiarise yourself with the tools mentioned in the job description, like SystemVerilog and UVM. Being able to discuss your experience with formal verification tools like Jasper Gold or VC_Formal will definitely impress.
✨Show Your Team Spirit
This role is all about collaboration, so be ready to demonstrate your team player skills. Think of examples where you've worked effectively in a team, especially in international settings. Highlighting your communication skills will show that you're not just technically savvy but also a great fit for their multi-discipline team.
✨Ask Smart Questions
Prepare some insightful questions about the projects you'll be working on and the team dynamics. This shows your genuine interest in the role and helps you gauge if the company culture aligns with your values. Plus, it gives you a chance to engage with the interviewers on a deeper level.
✨Be Open to Learning
The job description mentions a desire to learn other areas outside of ASIC Design and Verification. Be prepared to discuss how you’ve embraced learning opportunities in the past and express your enthusiasm for expanding your skill set. This will resonate well with the company's focus on career development.
