At a Glance
- Tasks: Lead DFT architecture and implement advanced testing methods for complex SoCs.
- Company: Global semiconductor leader based in the vibrant city of Cambridge.
- Benefits: Competitive salary, flexible working options, and opportunities for professional growth.
- Other info: Dynamic work environment with a focus on innovation and collaboration.
- Why this job: Join a cutting-edge team shaping the future of connected devices.
- Qualifications: 7+ years in DFT with strong skills in digital design and problem-solving.
The predicted salary is between 60000 - 80000 £ per year.
We are working with a global semiconductor business, who are developing advanced technologies for connected and intelligent devices in the heart of Cambridge. The company works across embedded compute, wireless connectivity, sensing, and human interface technologies, supporting the next generation of products used across consumer and commercial markets.
We are seeking a Senior Staff Design for Test (DFT) Engineer to join their growing ASIC team. This role will focus on DFT architecture and the implementation of MBIST, SCAN, and BSCAN for complex SoCs used in Voice Assistant and Multimedia applications.
Key responsibilities:
- Lead DFT architecture and implementation for complex SoCs, with a focus on MBIST, SCAN, and BSCAN.
- Help improve DFT methods and flows to make the team more efficient.
- Support pre-silicon validation of DFT logic at block and full-chip level.
- Optimise DFT logic for power, performance, and area.
- Support static timing closure for test logic across block and full-chip level.
- Work closely with Test Engineering to bring up and validate test patterns on ATE.
What we are looking for:
- Strong understanding of DFT architecture and digital design methods.
- Good communication and problem-solving skills.
- Able to work well with cross-functional and international teams.
- Self-motivated and comfortable working independently.
- Well organised, accurate, and detail-focused.
- Positive and adaptable approach to solving technical problems.
Requirements:
- 7+ years of relevant industry experience.
- Strong hands-on experience with DFT architecture for complex SoCs.
- Experience with Scan/EDT, MBIST, and Boundary Scan.
- Experience creating iJTAG structures in Verilog.
- Strong debug skills using waveforms.
- Experience with Perl scripting for EDA flows.
Interested in hearing more? Please apply!
DFT Engineer employer: Echelon Partners Limited
Echelon Partners Limited is an exceptional employer located in the vibrant tech hub of Cambridge, offering a dynamic work culture that fosters innovation and collaboration. Employees benefit from competitive salaries, comprehensive growth opportunities, and the chance to work on cutting-edge technologies in the semiconductor industry, all while being part of a supportive team that values creativity and problem-solving.
StudySmarter Expert Advice🤫
We think this is how you could land DFT Engineer
✨Tip Number 1
Network like a pro! Reach out to your connections in the semiconductor industry, especially those who might know about DFT roles. A friendly chat can sometimes lead to opportunities that aren’t even advertised.
✨Tip Number 2
Show off your skills! If you’ve got a portfolio or any projects related to DFT architecture, make sure to highlight them during interviews. It’s a great way to demonstrate your hands-on experience with MBIST, SCAN, and BSCAN.
✨Tip Number 3
Prepare for technical questions! Brush up on your knowledge of DFT methods and flows, as well as static timing closure. Being able to discuss these topics confidently will show you’re the right fit for the team.
✨Tip Number 4
Don’t forget to apply through our website! We love seeing candidates who are genuinely interested in joining us. Plus, it makes the process smoother for everyone involved.
We think you need these skills to ace DFT Engineer
Some tips for your application 🫡
Tailor Your CV:Make sure your CV is tailored to the DFT Engineer role. Highlight your experience with MBIST, SCAN, and BSCAN, and don’t forget to showcase your problem-solving skills and ability to work with cross-functional teams.
Craft a Compelling Cover Letter:Your cover letter is your chance to shine! Use it to explain why you’re passionate about DFT architecture and how your 7+ years of experience make you the perfect fit for our team. Keep it engaging and relevant!
Show Off Your Projects:If you've worked on any complex SoCs or have hands-on experience with DFT methods, be sure to mention these in your application. We love seeing real-world examples of your skills in action!
Apply Through Our Website:We encourage you to apply through our website for a smoother process. It helps us keep track of your application and ensures you don’t miss out on any important updates from us!
How to prepare for a job interview at Echelon Partners Limited
✨Know Your DFT Inside Out
Make sure you brush up on your knowledge of DFT architecture, especially MBIST, SCAN, and BSCAN. Be ready to discuss how you've implemented these in past projects and any challenges you faced. This will show your depth of understanding and hands-on experience.
✨Showcase Your Problem-Solving Skills
Prepare examples of how you've tackled complex technical problems in your previous roles. Highlight your communication skills by explaining your thought process clearly. This is crucial as the role requires collaboration with cross-functional teams.
✨Get Familiar with Their Products
Research the company’s products and technologies, especially those related to voice assistants and multimedia applications. Being able to discuss their specific use cases will demonstrate your genuine interest and help you stand out.
✨Practice Your Technical Communication
Since the role involves working closely with Test Engineering, practice explaining technical concepts in a clear and concise manner. You might be asked to describe your approach to static timing closure or how you optimise DFT logic, so being articulate is key.
