Senior FPGA Engineer: Low-Latency, SoC & Verilog Design

Senior FPGA Engineer: Low-Latency, SoC & Verilog Design

Full-Time No working from home possible
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DRW is seeking an Experienced FPGA Engineer to join our London trading team. You will build low-latency FPGA applications, bridging software and hardware to exploit market opportunities.

The role requires leadership from system design to production, RTL/Verilog development, timing closure, and close collaboration with software, trading and hardware groups. A strong background in FPGA design flow, SOC memories, and TCP/IP is essential.

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Senior FPGA Engineer: Low-Latency, SoC & Verilog Design employer: DRW

At DRW, we pride ourselves on being an exceptional employer that fosters a culture of innovation and collaboration. As a Technisch engineer, you will be part of a dynamic team where your contributions directly impact our trading strategies, all while enjoying opportunities for professional growth in a cutting-edge environment. With a commitment to integrity and high expectations, we empower our employees to take ownership of their work and explore new technologies, making DRW a truly rewarding place to advance your career.

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Contact Details:

DRW Recruitment Team