SoC DV Engineer β€” UVM/SystemVerilog & Embedded C

SoC DV Engineer β€” UVM/SystemVerilog & Embedded C

Full-Time On-site
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DELTACLASS TECHNOLOGY SOLUTIONS LIMITED is seeking experienced SoC Design Verification Engineers to verify next-generation multi-die SoC designs. You will perform subsystem- and SoC-level functional verification using SystemVerilog/UVM, and develop processor-based C tests for embedded cores.

You will reuse and enhance existing UVM testbenches, debug complex RTL simulations, and drive regression and coverage closure with a disciplined verification plan and cross-functional collaboration.

SoC DV Engineer β€” UVM/SystemVerilog & Embedded C employer: DELTACLASS TECHNOLOGY SOLUTIONS LIMITED

As a leading employer in the tech industry, we offer a dynamic work environment that fosters innovation and collaboration. Our commitment to employee growth is evident through continuous learning opportunities and a culture that values diverse perspectives, making it an ideal place for Data & AI Solution Architects to thrive. Located in a vibrant area, we provide competitive benefits and a supportive atmosphere that encourages work-life balance and professional development.

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Contact Details:

DELTACLASS TECHNOLOGY SOLUTIONS LIMITED Recruitment Team