Physical Design Engineer (Advanced Node / ASIC / Full Flow Implementation) in London
Physical Design Engineer (Advanced Node / ASIC / Full Flow Implementation)

Physical Design Engineer (Advanced Node / ASIC / Full Flow Implementation) in London

London Full-Time 60000 - 80000 £ / year (est.) No home office possible
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At a Glance

  • Tasks: Implement advanced ASIC designs from netlist to GDSII, optimising performance and power.
  • Company: Global tech leader in semiconductor and high-performance computing systems.
  • Benefits: Competitive pay, long-term growth opportunities, and exposure to cutting-edge projects.
  • Other info: Fast-paced environment with strong emphasis on collaboration and continuous learning.
  • Why this job: Join a dynamic team shaping the future of technology with innovative ASIC solutions.
  • Qualifications: Degree in Microelectronics or related field; familiarity with physical design tools.

The predicted salary is between 60000 - 80000 £ per year.

My client is a global technology company focused on advanced semiconductor and high-performance computing systems. The engineering team is dedicated to building next-generation ASIC solutions across advanced process nodes, supporting large-scale compute-intensive applications. The team operates in a highly technical and fast-paced environment, with strong emphasis on physical implementation, performance optimization, and full-chip delivery. They are currently expanding their physical design team to support growing project demands across advanced nodes.

Job Responsibilities

  • Perform end-to-end physical design implementation from netlist to GDSII for advanced ASIC projects.
  • Work on key stages including floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and optimization.
  • Drive timing closure across MMMC scenarios, including setup/hold fixing, clock optimization, and ECO implementation.
  • Conduct physical verification and signoff tasks (DRC, LVS, IR drop, EM analysis) to ensure tape-out readiness.
  • Optimize power, performance, and area (PPA) through iterative design improvements.
  • Collaborate closely with front-end design, DFT, and signoff teams to resolve integration and late-stage issues.
  • Contribute to design methodology improvements and automation through scripting and tooling enhancements.

Job Requirements

  • Bachelor’s degree or above in Microelectronics, Electronic Engineering, or related fields.
  • Understanding of physical design flow and IC development process.
  • Familiarity with PnR tools such as ICC2, Fusion Compiler, or Innovus.
  • Knowledge of timing analysis, power optimization, and physical verification concepts.
  • Basic scripting skills (TCL / Python / Shell) for automation is a plus.
  • Strong learning ability and willingness to work in advanced technology environments.

What They Offer

  • Opportunity to work on cutting-edge semiconductor projects at advanced technology nodes.
  • Exposure to full-chip design flow and large-scale ASIC development.
  • Competitive compensation and long-term growth opportunities.

Physical Design Engineer (Advanced Node / ASIC / Full Flow Implementation) in London employer: Consortium for Clinical Research and Innovation Singapore

As a leading global technology company, we pride ourselves on fostering a dynamic and innovative work culture that empowers our Physical Design Engineers to excel in their roles. With a focus on cutting-edge semiconductor projects and advanced technology nodes, employees benefit from competitive compensation, extensive growth opportunities, and the chance to collaborate with top-tier talent in a fast-paced environment. Join us to be part of a team that values creativity, technical excellence, and continuous improvement.
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Contact Detail:

Consortium for Clinical Research and Innovation Singapore Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Physical Design Engineer (Advanced Node / ASIC / Full Flow Implementation) in London

✨Tip Number 1

Network like a pro! Reach out to folks in the semiconductor and ASIC space on LinkedIn or at industry events. We all know that sometimes it’s not just what you know, but who you know that can help you land that dream job.

✨Tip Number 2

Show off your skills! Create a portfolio showcasing your projects, especially those related to physical design implementation. We want to see your work with PnR tools and any cool scripts you've written. This will make you stand out when you apply through our website.

✨Tip Number 3

Prepare for technical interviews by brushing up on key concepts like timing analysis and power optimization. We recommend doing mock interviews with friends or using online platforms to get comfortable with the questions you might face.

✨Tip Number 4

Don’t forget to follow up! After interviews, send a quick thank-you email to express your appreciation. It shows your enthusiasm for the role and keeps you fresh in their minds. Plus, we love seeing candidates who are proactive!

We think you need these skills to ace Physical Design Engineer (Advanced Node / ASIC / Full Flow Implementation) in London

Physical Design Implementation
Floorplanning
Power Planning
Placement
Clock Tree Synthesis (CTS)
Routing
Timing Closure
Setup/Hold Fixing
Clock Optimization
ECO Implementation
Physical Verification
DRC
LVS
IR Drop Analysis
EM Analysis
Power, Performance, and Area (PPA) Optimization
PnR Tools (ICC2, Fusion Compiler, Innovus)
Timing Analysis
Basic Scripting Skills (TCL, Python, Shell)

Some tips for your application 🫡

Tailor Your CV: Make sure your CV highlights your experience with physical design and ASIC projects. We want to see how your skills align with the job description, so don’t be shy about showcasing relevant projects and tools you've used!

Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about semiconductor technology and how your background makes you a great fit for our team. Keep it concise but impactful!

Show Off Your Technical Skills: Don’t forget to mention your familiarity with PnR tools and any scripting skills you have. We love candidates who can bring technical expertise to the table, so make sure to highlight these in your application.

Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it’s super easy!

How to prepare for a job interview at Consortium for Clinical Research and Innovation Singapore

✨Know Your ASIC Basics

Make sure you brush up on your knowledge of ASIC design and the physical design flow. Understand key concepts like floorplanning, placement, and routing, as these will likely come up in conversation. Being able to discuss these topics confidently will show that you're well-prepared and serious about the role.

✨Familiarise with Tools

Since familiarity with PnR tools like ICC2, Fusion Compiler, or Innovus is crucial, take some time to review their functionalities. If possible, try to get hands-on experience or at least watch tutorials. This will not only help you answer technical questions but also demonstrate your proactive approach to learning.

✨Prepare for Technical Questions

Expect to face technical questions related to timing analysis, power optimisation, and physical verification. Prepare by reviewing common scenarios and problems you might encounter in these areas. Practising how to articulate your thought process can really set you apart during the interview.

✨Show Your Scripting Skills

If you have any basic scripting skills in TCL, Python, or Shell, be ready to discuss them. Even if you’re not an expert, showing a willingness to learn and improve your automation skills can be a big plus. Consider preparing a small example of how you've used scripting in past projects to illustrate your point.

Physical Design Engineer (Advanced Node / ASIC / Full Flow Implementation) in London
Consortium for Clinical Research and Innovation Singapore
Location: London

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