Senior FPGA Emulation & Evaluation Engineer

Senior FPGA Emulation & Evaluation Engineer

Full-Time 60000 - 80000 Β£ / year (est.) No working from home possible
Cirrus Logic, Inc.

At a Glance

  • Tasks: Evaluate cutting-edge ASICs and prototype on FPGA while driving improvements across hardware and software.
  • Company: Join Cirrus Logic, a leader in mixed-signal technology with a collaborative team.
  • Benefits: Competitive salary, flexible working options, and opportunities for professional growth.
  • Other info: Dynamic work environment with excellent career advancement opportunities.
  • Why this job: Make a real impact in the tech industry by working on innovative emulation projects.
  • Qualifications: Experience in system emulation, FPGA prototyping, and strong analytical skills.

The predicted salary is between 60000 - 80000 Β£ per year.

Cirrus Logic is seeking a senior-level System Emulation and Evaluation Engineer to join our emulation team.

Based in the United Kingdom (Edinburgh or Newbury), you will evaluate our industry-leading mixed-signal ASICs, prototype on FPGA, and perform Proof-of-Concept investigations.

You will help translate requirements into robust test plans, interpret results, and drive improvements across hardware, firmware, and software interfaces.

#J-18808-Ljbffr

Senior FPGA Emulation & Evaluation Engineer employer: Cirrus Logic, Inc.

Cirrus Logic, Inc. is an excellent employer that fosters a collaborative and inclusive work culture in its Edinburgh office, where employees are encouraged to grow their technical skills and advance their careers. With a strong emphasis on customer service and teamwork, the company offers meaningful opportunities for professional development while providing high-quality IT support to users globally.

Cirrus Logic, Inc.

Contact Details:

Cirrus Logic, Inc. Recruitment Team

We think you need these skills to ace Senior FPGA Emulation & Evaluation Engineer

FPGA Prototyping
Mixed-Signal ASIC Evaluation
System Emulation
Proof-of-Concept Investigations
Test Plan Development
Results Interpretation
Hardware Interface Knowledge