Arm Solution Engineering is seeking a talented RTL design engineer to join the Front End design team within the SoC Engineering group. You will contribute to specification, design and verification of subsystems and testchips, developing RTL and related design intent deliverables, and collaborating with IP integration and verification teams to ensure high quality delivery.
We value strong SystemVerilog/Verilog expertise, knowledge of RTL and CPU/GPU/multimedia IP, UNIX scripting, and
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Senior Subsystem & SoC Design Engineer employer: Camwebdir
Arm is an exceptional employer that fosters a diverse and inclusive work culture, encouraging collaboration across multiple countries in western Europe. With flexible working practices and a strong commitment to employee wellbeing, we empower our teams to shape the future of AI on edge devices while providing ample opportunities for professional growth and influence within the tech community. Join us to be part of a pioneering team that values innovation and supports your journey in the rapidly evolving field of machine learning.
