At a Glance
- Tasks: Lead complex Silicon programs and collaborate on next-gen Chiplet solutions.
- Company: Join Cadence, a leader in innovative IP and Chiplet technology.
- Benefits: Competitive salary, diverse work culture, and opportunities for professional growth.
- Other info: Work in a dynamic environment with global collaboration and industry recognition.
- Why this job: Make an impact in high-tech markets like AI and DataCentre with cutting-edge technology.
- Qualifications: 12+ years in microelectronics, Verilog RTL design, and team leadership experience required.
The predicted salary is between 80000 - 100000 £ per year.
The Cadence Silicon Solutions Group (SSG) develop leading edge Intellectual Property (IP) and Chiplet Solutions for a variety of High-Tech Markets. The Cadence IP & Chiplet solutions allow our Customers to tackle Silicon product development in a system context, enabling them to focus on product differentiation and to reduce time to volume. The Cadence Vision is to deliver industry leading IP & Chiplet solutions to enable our customers to be successful across fast-moving application spaces such as Physical AI, DataCentre and High Performance Computing.
The Sr Principal Design Engineer will be based in Edinburgh as part of an experienced Front‑End Engineering Team, working with our Global Chiplet team in Europe, India and the USA.
Job Responsibilities
- Technical leadership of complex Silicon programs consisting of leading‑edge IP
- Work closely with our Chiplet Architecture team to define next generation Chiplets
- Integration of Cadence IP Solutions e.g. UCIe, PCIe, Ethernet, USB, NPU, Audio, Vision
- Integration of partner IP Solutions e.g. CPUs, ISP, Silicon Monitors, NoCs
- Hands‑on leadership of RTL, Testbench, Formal Analysis and Trial Synthesis activities
- Quality Assurance, via implementation of hierarchical LINT, CDC and release flows
- Planning of activities and milestones for Chiplet Subsystems and System IP development
- Leadership of cross‑functional technical meetings with domain leads e.g. Verification, SW
- Support customer pre‑sales and post‑sales meetings
- Participate in Technical Review Meetings and Checklist Reviews as part of ISO-9001
- Represent Cadence by presenting at Industry Conferences such as IEEE, DAC, CDNLive
Job Qualifications
- Degree in Electrical/Electronic Engineering, Microelectronics, or a related discipline
- 12+ years’ experience in microelectronics/EDA industry
- Experience of Verilog RTL Design essential
- Experience of Metric Driven Verification (MDV) essential
- Experience of Front‑end design tools covering LINT, Synthesis, CDC Analysis essential
- Experience of SoC Architecture and Development essential
- Experience of Technical Team leadership essential
- Excellent oral and written English essential
- Self‑motivated with excellent planning, interpersonal, and communication skills
Additional Skills/Preferences
- Experience of AMBA, PCIe, CXL & UCIe protocols preferred
- Experience of Quality processes, such as ISO-9001 & ISO-26262 preferred
Travel 10%
Equal Employment Opportunity Statement Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
Sr Principal Design Engineer (Chiplet Solutions) employer: Cadence
Cadence is an exceptional employer, offering a dynamic work environment in Edinburgh that fosters innovation and collaboration within the high-tech sector. With a strong commitment to employee growth, we provide opportunities for technical leadership and participation in industry conferences, ensuring our team members are at the forefront of advancements in Chiplet Solutions. Our inclusive culture values diversity and encourages a supportive atmosphere where every employee can thrive and contribute to cutting-edge projects.
StudySmarter Expert Advice🤫
We think this is how you could land Sr Principal Design Engineer (Chiplet Solutions)
✨Tip Number 1
Network like a pro! Reach out to your connections in the industry, especially those who work at Cadence or similar companies. A friendly chat can sometimes lead to insider info about job openings or even a referral.
✨Tip Number 2
Prepare for interviews by brushing up on your technical skills and understanding the latest trends in chiplet solutions. We recommend practising common interview questions and having a few examples ready that showcase your leadership and problem-solving abilities.
✨Tip Number 3
Don’t just wait for job postings! Keep an eye on our website and apply directly through it. This shows your enthusiasm and can sometimes get you noticed faster than the competition.
✨Tip Number 4
Follow up after interviews with a thank-you email. It’s a simple gesture that can leave a lasting impression. Mention something specific from your conversation to show you were engaged and are genuinely interested in the role.
We think you need these skills to ace Sr Principal Design Engineer (Chiplet Solutions)
Some tips for your application 🫡
Tailor Your CV:Make sure your CV is tailored to the Sr Principal Design Engineer role. Highlight your experience in microelectronics and EDA, especially with Verilog RTL Design and Metric Driven Verification. We want to see how your skills align with our needs!
Craft a Compelling Cover Letter:Your cover letter is your chance to shine! Use it to explain why you're passionate about Chiplet Solutions and how your background makes you a perfect fit for our team. Let us know what excites you about working at Cadence.
Showcase Your Leadership Skills:Since this role involves technical leadership, be sure to highlight any relevant experiences where you've led teams or projects. We love seeing examples of how you've driven success in complex Silicon programs!
Apply Through Our Website:We encourage you to apply through our website for the best chance of getting noticed. It’s super easy, and you’ll be able to submit all your materials in one go. Plus, we can’t wait to see your application!
How to prepare for a job interview at Cadence
✨Know Your Tech Inside Out
Make sure you’re well-versed in the latest trends and technologies related to chiplet solutions and IP development. Brush up on your knowledge of Verilog RTL design, Metric Driven Verification, and front-end design tools. Being able to discuss these topics confidently will show that you're not just familiar with the basics but are genuinely passionate about the field.
✨Prepare for Technical Leadership Questions
As a Sr Principal Design Engineer, you'll be expected to lead complex silicon programs. Be ready to share examples from your past experiences where you've successfully led teams or projects. Think about challenges you faced and how you overcame them, as this will demonstrate your leadership skills and problem-solving abilities.
✨Familiarise Yourself with Cadence's Vision
Understand Cadence’s goals and how their chiplet solutions fit into the broader market landscape. Research their recent projects and innovations, especially in areas like Physical AI and High Performance Computing. This knowledge will help you align your answers with their vision and show that you’re genuinely interested in contributing to their success.
✨Practice Your Presentation Skills
Since you might be representing Cadence at industry conferences, it’s crucial to be comfortable presenting technical information clearly and engagingly. Consider rehearsing a short presentation on a relevant topic, focusing on clarity and confidence. This will not only prepare you for potential questions but also showcase your communication skills during the interview.
