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- Tasks: Develop and validate cutting-edge SoC reference systems for high-performance applications.
- Company: Join Cadence, a leader in electronic design with over 30 years of innovation.
- Benefits: Enjoy a dynamic work environment with opportunities for growth and collaboration.
- Why this job: Make an impact in technology while working on exciting projects in AI and automotive.
- Qualifications: BS/MS in Electronic Engineering/Computer Science with relevant experience in ASIC design and verification.
- Other info: Cadence values diversity and is committed to equal employment opportunities.
The predicted salary is between 43200 - 72000 £ per year.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title: Sr Principal Verification Engineer
Location: Cambridge
Reports to: Sr Design Engineering Architect
Job Overview:
The Cadence Computer Systems Group (CSG) develops and licenses IP for system designs. This includes CPUs and high-performance DSPs, DDR and IO controllers, hardware accelerators, and subsystems. Our IP designs are used by most of the top semiconductor vendors today, and our customers are shipping billions of chips annually using our components.
The CSG Central Applications Engineering team seeks an experienced and talented SoC design engineer to join a new team for CSG systems. In this role, you will be responsible for developing and validating reference systems for Computer Vision, Machine Learning, Radar, Automotive, and other high-performance applications.
This is a technically rewarding role with high visibility within the organization. The team is responsible for supporting customers of CSG subsystems. The group will also implement reference designs on emulation systems and support applications for product demonstrations.
This role requires extensive experience IP integration and implementing SoC and compute-based systems. You will work closely with compute and interface IP development engineering and build designs to demonstrate the capabilities of CSG subsystems and components.
Responsibilities:
- Develop, implement, and debug SoC reference systems.
- Integrate compute, memory and interface IP in system designs.
- Analyse IP products and implementation flows.
- Identify gaps and work with development teams to improve products.
- Develop collateral, and training material for CSG system customers.
- Identify and implement best practices in hardware design, testing, and validation to improve efficiency and reliability.
- Stay up to date with latest industry trends, technologies, and design methodologies, and incorporate them into team’s workflows.
Requirements:
- BS in Electronic Engineering/Computer Science with 8+ years work experience, or MS in EE/CS with 4 + years’ experience.
- Must have at least 3 years of experience in ASIC design, integration, or verification .
- Must have expertise in some of the following domains: processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets .
- Expertise in Verilog/System Verilog for coding and verification.
- Proficiency in RTL design techniques, including synthesis, timing closure, and verification.
- Experience in using UVM for functional verification of ASIC designs.
- Experience with EDA tools like Cadence and Synopsys for design simulation and verification.
- Extensive experience with FPGA emulation, design tools, and verification.
Additional Information:
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
We’re doing work that matters. Help us solve what others can’t. #J-18808-Ljbffr
Sr Principal Verification Engineer employer: Cadence Design Systems
Contact Detail:
Cadence Design Systems Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Sr Principal Verification Engineer
✨Tip Number 1
Familiarise yourself with the latest trends in SoC design and verification. Being knowledgeable about current technologies like Machine Learning and Computer Vision will not only help you in interviews but also show your genuine interest in the field.
✨Tip Number 2
Network with professionals in the semiconductor industry, especially those who work at Cadence or similar companies. Attend relevant conferences or webinars to make connections and gain insights that could give you an edge during the hiring process.
✨Tip Number 3
Prepare to discuss specific projects where you've implemented SoC designs or worked with ASIC verification. Be ready to explain your role, the challenges you faced, and how you overcame them, as this will demonstrate your hands-on experience.
✨Tip Number 4
Showcase your expertise in Verilog/System Verilog and UVM during discussions. Highlight any unique approaches or best practices you've developed in your previous roles, as this can set you apart from other candidates.
We think you need these skills to ace Sr Principal Verification Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights relevant experience in ASIC design, integration, and verification. Emphasise your expertise in Verilog/System Verilog and any experience with EDA tools like Cadence and Synopsys.
Craft a Compelling Cover Letter: Write a cover letter that showcases your passion for technology and innovation. Mention specific projects or experiences that align with the responsibilities of the Sr Principal Verification Engineer role at Cadence.
Highlight Relevant Skills: In your application, clearly outline your skills in RTL design techniques, UVM for functional verification, and FPGA emulation. Use examples to demonstrate how you've applied these skills in past roles.
Showcase Continuous Learning: Mention any recent courses, certifications, or industry trends you’ve followed that relate to high-performance applications, machine learning, or computer vision. This shows your commitment to staying current in the field.
How to prepare for a job interview at Cadence Design Systems
✨Showcase Your Technical Expertise
As a Sr Principal Verification Engineer, you'll need to demonstrate your deep understanding of ASIC design and verification. Be prepared to discuss your experience with Verilog/System Verilog, UVM, and EDA tools like Cadence and Synopsys. Highlight specific projects where you've successfully integrated IP or validated complex systems.
✨Understand the Company’s Vision
Cadence is all about innovation in electronic design. Familiarise yourself with their Intelligent System Design strategy and how it applies to the latest technologies like Machine Learning and 5G communications. Showing that you understand their mission will set you apart from other candidates.
✨Prepare for Problem-Solving Questions
Expect to face technical challenges during the interview. Prepare to walk through your thought process on how you would approach debugging SoC reference systems or improving product implementation flows. This will showcase your analytical skills and ability to think critically under pressure.
✨Demonstrate Your Collaborative Spirit
The role involves working closely with various teams, so it's essential to show that you're a team player. Share examples of how you've collaborated with cross-functional teams in the past, particularly in developing training materials or best practices in hardware design and validation.
