At a Glance
- Tasks: Lead innovative chip design projects and collaborate with global teams.
- Company: Join Cadence, a leader in electronic design with over 30 years of expertise.
- Benefits: Competitive salary, diverse workplace, and opportunities for professional growth.
- Other info: Dynamic environment with a focus on innovation and teamwork.
- Why this job: Make a real impact in high-tech markets like AI and 5G communications.
- Qualifications: 12+ years in microelectronics, strong Verilog RTL design skills required.
The predicted salary is between 80000 - 100000 £ per year.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
Job Overview: The Cadence Silicon Solutions Group (SSG) develop leading edge Intellectual Property (IP) and Chiplet Solutions for a variety of High-Tech Markets. The Cadence IP & Chiplet solutions allow our Customers to tackle Silicon product development in a system context, enabling them to focus on product differentiation and to reduce time to volume. The Cadence Vision is to deliver industry leading IP & Chiplet solutions to enable our customers to be successful across fast-moving application spaces such as Physical AI, DataCentre and High Performance Computing. The Sr Principal Design Engineer will be based in Edinburgh as part of an experienced Front-End Engineering Team, working with our Global Chiplet team in Europe, India and the USA.
Job Responsibilities:
- Technical leadership of complex Silicon programs consisting of leading-edge IP
- Work closely with our Chiplet Architecture team to define next generation Chiplets
- Integration of Cadence IP Solutions e.g. UCIe, PCIe, Ethernet, USB, NPU, Audio, Vision
- Integration of partner IP Solutions e.g. CPUs, ISP, Silicon Monitors, NoCs
- Hands-on leadership of RTL, Testbench, Formal Analysis and Trial Synthesis activities
- Quality Assurance, via implementation of hierarchical LINT, CDC and release flows
- Planning of activities and milestones for Chiplet Subsystems and System IP development
- Leadership of cross-functional technical meetings with domain leads e.g. Verification, SW
- Support customer pre-sales and post-sales meetings
- Participate in Technical Review Meetings and Checklist Reviews as part of ISO-9001
- Represent Cadence by presenting at Industry Conferences such as IEEE, DAC, CDNLive
Job Qualifications:
- Degree in Electrical/Electronic Engineering, Microelectronics, or a related discipline
- 12+ years’ experience in microelectronics/EDA industry
- Experience of Verilog RTL Design essential
- Experience of Metric Driven Verification (MDV) essential
- Experience of Front-end design tools covering LINT, Synthesis, CDC Analysis essential
- Experience of SoC Architecture and Development essential
- Experience of Technical Team leadership essential
- Excellent oral and written English essential
- Self-motivated with excellent planning, interpersonal, and communication skills
Additional Skills/Preferences:
- Experience of AMBA, PCIe, CXL & UCIe protocols preferred
- Experience of Quality processes, such as ISO-9001 & ISO-26262 preferred
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
Sr Principal Design Engineer (Chiplet Solutions) employer: Cadence Design Systems
At Cadence, we pride ourselves on fostering a dynamic and inclusive work culture that empowers our employees to innovate and lead in the technology sector. Located in the vibrant city of Edinburgh, our team enjoys access to cutting-edge projects in the high-tech market, along with ample opportunities for professional growth and collaboration with global experts. With a commitment to employee development and a focus on impactful work, Cadence is an exceptional employer for those looking to make a difference in the world of electronic design.
StudySmarter Expert Advice🤫
We think this is how you could land Sr Principal Design Engineer (Chiplet Solutions)
✨Tip Number 1
Network like a pro! Reach out to folks in the industry, especially those at Cadence. A friendly chat can open doors that a CV just can't.
✨Tip Number 2
Show off your skills! Prepare a portfolio or case studies of your past projects. When you get that interview, let them see what you can do!
✨Tip Number 3
Practice makes perfect! Get a mate to do mock interviews with you. It’ll help you feel more confident and ready to tackle those tricky questions.
✨Tip Number 4
Apply through our website! It’s the best way to ensure your application gets seen. Plus, it shows you’re genuinely interested in joining the team.
We think you need these skills to ace Sr Principal Design Engineer (Chiplet Solutions)
Some tips for your application 🫡
Tailor Your CV:Make sure your CV is tailored to the Sr Principal Design Engineer role. Highlight your experience in microelectronics and EDA, especially focusing on Verilog RTL Design and Metric Driven Verification. We want to see how your skills align with what we're looking for!
Craft a Compelling Cover Letter:Your cover letter is your chance to shine! Use it to explain why you're passionate about chiplet solutions and how your background makes you a perfect fit for our team. We love seeing enthusiasm and a clear understanding of our work.
Showcase Your Leadership Skills:Since this role involves technical leadership, be sure to highlight any relevant experiences where you've led teams or projects. We value strong leadership, so share examples that demonstrate your ability to guide and inspire others.
Apply Through Our Website:We encourage you to apply directly through our website. It’s the best way to ensure your application gets into the right hands. Plus, it shows us that you're serious about joining our team at Cadence!
How to prepare for a job interview at Cadence Design Systems
✨Know Your Chiplets
Make sure you brush up on your knowledge of chiplet architecture and integration. Familiarise yourself with Cadence's specific IP solutions like UCIe and PCIe, as well as partner IPs. Being able to discuss these in detail will show your technical prowess and genuine interest in the role.
✨Showcase Your Leadership Skills
As a Sr Principal Design Engineer, you'll need to demonstrate your leadership experience. Prepare examples of how you've led complex silicon programs or cross-functional teams in the past. Highlight your ability to plan activities and milestones effectively, as this is crucial for the role.
✨Prepare for Technical Discussions
Expect to engage in technical discussions during the interview. Brush up on Verilog RTL design and metric-driven verification. Be ready to explain your approach to quality assurance and how you've implemented processes like hierarchical LINT and CDC analysis in previous projects.
✨Communicate Clearly
Excellent communication skills are essential for this position. Practice articulating your thoughts clearly and concisely, especially when discussing complex technical concepts. Remember, it's not just about what you know, but how you convey that knowledge to others.
