Chief Technology Officer in Penarth

We are building a fundamentally new AI compute paradigm — one that moves beyond traditional GPU/TPU architectures. Rather than relying on matrix-matrix execution pipelines and instruction-driven scheduling, our system performs computation directly within persistent data structures mapped onto silicon. This enables a new class of scalable, structure-native compute infrastructure with significantly improved dataflow efficiency, latency characteristics, and system scalability.

We are seeking a Chief Technology Officer to co‑lead the translation of this architectural paradigm into manufacturable silicon and deployable compute infrastructure. This is not a conventional chip CTO role. It is a system‑level architecture + silicon realization + infrastructure scaling challenge.

Role Overview

• Co‑define and industrialize a non‑GPU‑path AI compute architecture based on structure‑driven dataflow
• Translate architectural concepts into manufacturable silicon across realistic process nodes (28nm–5nm)
• Own end‑to‑end system realization: chip → package → board → cluster‑scale infrastructure
• Lead development of a scalable compute platform for large‑model workloads
• Build and lead a multidisciplinary engineering organization

Core Responsibilities

1. Architecture & System Definition
   • Co‑develop the compute paradigm with the founding team
   • Define system‑level architecture across chip, interconnect, and cluster scaling
   • Design dataflow embedded in structure rather than instruction scheduling
   • Ensure feasibility across power, memory, and interconnect constraints
2. Silicon Development & Engineering Execution
   • Lead full chip lifecycle: architecture → RTL → tape‑out
   • Ensure manufacturability across process nodes (28nm–5nm)
   • Drive chip‑package‑system co‑design
3. Packaging, Interconnect & System Integration
   • Define advanced packaging strategies (chiplet, RDL, fan‑out)
   • Optimize interconnect topology, bandwidth, and latency
   • Lead system integration and bring‑up
4. Foundry, OSAT & Supply Chain Strategy
   • Manage foundry and OSAT relationships
   • Lead PDK, IP integration, DFM, and yield optimization
   • Build a scalable and resilient supply chain
5. Software Stack & Structure‑Aware Execution
   • Build a structure‑aware compiler and runtime
   • Develop mapping system from computation graph to hardware structure
   • Enable efficient execution of large AI models
6. Infrastructure Scaling & Performance Optimization
   • Define scaling strategy from chip to cluster
   • Optimize throughput, latency, energy efficiency, and cost
7. Organization & Leadership
   • Build and lead teams across silicon, systems, and software disciplines
   • Establish engineering processes and execution discipline
8. Productization & Ecosystem
   • Lead validation, bring‑up, and deployment
   • Align technical roadmap with commercialization goals
   • Support strategic partnerships and ecosystem development

Required Experience

• 15–20+ years in semiconductor and compute systems
• Proven track record delivering silicon to production
• Hands‑on experience in AI accelerators, GPUs, or HPC systems
• Strong system‑level architecture capability across chip, package, and infrastructure
• Demonstrated experience building and leading large, multidisciplinary engineering teams

What Makes This Role Unique

• Rare opportunity to define and shape a post‑GPU compute paradigm from the ground up
• Work on structure‑driven computation — a genuinely differentiated approach to AI hardware
• Build compute infrastructure at system scale, not just chips
• High‑impact, founding‑level influence on product and company direction