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- Tasks: Develop and maintain verification environments for cutting-edge FPGA and ASIC designs.
- Company: Join a leading global technology firm with a focus on innovation.
- Benefits: Competitive salary, flexible work options, and opportunities for professional growth.
- Why this job: Make an impact in real-time systems and enhance the EDA ecosystem.
- Qualifications: 2+ years in FPGA/ASIC verification and strong SystemVerilog skills required.
- Other info: Collaborative team environment with a focus on tool improvement and open-source contributions.
The predicted salary is between 36000 - 60000 £ per year.
A leading global technology firm is seeking a Senior Design Verification Engineer to work on high-performance FPGA and ASIC systems used in ultra-low-latency, real-time environments. This role focuses on building robust verification frameworks to ensure the correctness, reliability, and performance of complex hardware designs.
You’ll design and own verification environments, work closely with RTL designers on rapid bring-up and debugging, and contribute to both internal and open-source tooling. The team values engineers who are not only strong verifiers but also enjoy improving tools, workflows, and the broader EDA ecosystem. No domain-specific (e.g., finance) experience is required.
Key responsibilities:
- Develop testbenches, tests, and verification environments for FPGA/ASIC designs
- Create and maintain detailed verification plans
- Debug and root-cause complex RTL issues
- Collaborate closely with hardware designers on new and existing projects
- Manage test suites, coverage, and CI infrastructure
- Contribute to internal tools and open-source verification projects
Key requirements:
- ~2+ years’ experience in FPGA or ASIC functional verification
- ~ Strong SystemVerilog skills (UVM or similar frameworks)
- ~ Experience with functional and code coverage
- ~ Proficiency in Python; C++ a plus
- ~ Comfortable working in a Linux environment
- ~ Familiarity with Verilator and/or Cocotb is advantageous
- ~ Degree in Electrical Engineering, Computer Science, or related field
Senior Engineer, Design Verification Engineering in London employer: Berkeley Square - Talent Specialists in IT & Engineering
Contact Detail:
Berkeley Square - Talent Specialists in IT & Engineering Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior Engineer, Design Verification Engineering in London
✨Tip Number 1
Network like a pro! Reach out to your connections in the tech industry, especially those who work with FPGA or ASIC systems. A friendly chat can lead to insider info about job openings that might not even be advertised yet.
✨Tip Number 2
Show off your skills! Create a portfolio showcasing your verification environments and any open-source contributions you've made. This is a great way to demonstrate your expertise in SystemVerilog and Python, making you stand out to potential employers.
✨Tip Number 3
Prepare for technical interviews by brushing up on your debugging skills. Be ready to discuss complex RTL issues you've tackled in the past and how you collaborated with hardware designers. Real-world examples will make your experience shine!
✨Tip Number 4
Don't forget to apply through our website! We love seeing candidates who are genuinely interested in joining our team. Plus, it gives us a chance to see your application in the best light possible.
We think you need these skills to ace Senior Engineer, Design Verification Engineering in London
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience in FPGA or ASIC functional verification. We want to see your strong SystemVerilog skills and any relevant projects you've worked on, so don’t hold back!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Tell us why you’re passionate about design verification and how your background aligns with our needs. We love seeing enthusiasm for improving tools and workflows.
Showcase Your Technical Skills: Be specific about your technical expertise, especially in Python and any experience with Linux environments. If you’ve worked with Verilator or Cocotb, make sure to mention it – we’re keen on those details!
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for this exciting opportunity with our team!
How to prepare for a job interview at Berkeley Square - Talent Specialists in IT & Engineering
✨Know Your Stuff
Make sure you brush up on your SystemVerilog skills and be ready to discuss your experience with UVM or similar frameworks. Be prepared to explain how you've developed testbenches and verification environments in past projects.
✨Show Off Your Problem-Solving Skills
Expect to tackle some complex RTL issues during the interview. Think of examples from your previous work where you debugged tricky problems and be ready to walk through your thought process.
✨Collaboration is Key
Since this role involves working closely with hardware designers, be prepared to discuss how you've collaborated on projects in the past. Highlight any experiences where you improved workflows or contributed to team success.
✨Get Familiar with Tools
If you have experience with Verilator or Cocotb, make sure to mention it! Even if you haven't used them extensively, showing that you're eager to learn about these tools can set you apart from other candidates.
