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- Tasks: Create and manage verification environments for cutting-edge FPGA and ASIC designs.
- Company: Join a leading global tech firm with a focus on innovation.
- Benefits: Competitive salary, flexible work options, and opportunities for professional growth.
- Why this job: Make an impact in real-time systems and enhance the EDA ecosystem.
- Qualifications: 2+ years in FPGA/ASIC verification and strong SystemVerilog skills required.
- Other info: Collaborative team environment with a passion for improving tools and workflows.
The predicted salary is between 36000 - 60000 £ per year.
A leading global technology firm is seeking a Senior Design Verification Engineer to work on high-performance FPGA and ASIC systems used in ultra-low-latency, real-time environments. This role focuses on building robust verification frameworks to ensure the correctness, reliability, and performance of complex hardware designs.
You’ll design and own verification environments, work closely with RTL designers on rapid bring-up and debugging, and contribute to both internal and open-source tooling. The team values engineers who are not only strong verifiers but also enjoy improving tools, workflows, and the broader EDA ecosystem. No domain-specific (e.g., finance) experience is required.
Key responsibilities:- Develop testbenches, tests, and verification environments for FPGA/ASIC designs
- Create and maintain detailed verification plans
- Debug and root-cause complex RTL issues
- Collaborate closely with hardware designers on new and existing projects
- Manage test suites, coverage, and CI infrastructure
- Contribute to internal tools and open-source verification projects
- 2+ years’ experience in FPGA or ASIC functional verification
- Strong SystemVerilog skills (UVM or similar frameworks)
- Experience with functional and code coverage
- Proficiency in Python; C++ a plus
- Comfortable working in a Linux environment
- Familiarity with Verilator and/or Cocotb is advantageous
- Degree in Electrical Engineering, Computer Science, or related field
Senior Design Verification Engineer in London employer: Berkeley Square - Talent Specialists in IT & Engineering
Contact Detail:
Berkeley Square - Talent Specialists in IT & Engineering Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior Design Verification Engineer in London
✨Tip Number 1
Networking is key! Reach out to your connections in the industry, attend meetups, and engage with professionals on platforms like LinkedIn. We can’t stress enough how a personal connection can sometimes get you that interview slot.
✨Tip Number 2
Prepare for technical interviews by brushing up on your SystemVerilog skills and understanding verification frameworks. We recommend doing mock interviews with friends or using online platforms to simulate the real deal.
✨Tip Number 3
Showcase your projects! Whether it’s a GitHub repo or a portfolio, having tangible evidence of your work can set you apart. We love seeing candidates who take initiative and contribute to open-source projects.
✨Tip Number 4
Don’t forget to apply through our website! It’s the best way to ensure your application gets seen. Plus, we often have exclusive roles listed there that you won’t find anywhere else.
We think you need these skills to ace Senior Design Verification Engineer in London
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Senior Design Verification Engineer role. Highlight your experience with FPGA/ASIC verification and any relevant projects you've worked on. We want to see how your skills align with what we're looking for!
Show Off Your Skills: Don’t hold back on showcasing your SystemVerilog and Python skills! Include specific examples of how you've used these in past roles. We love seeing practical applications of your expertise, so let us know what you can bring to the table.
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about design verification and how you can contribute to our team. Keep it engaging and personal – we want to get to know you beyond your CV.
Apply Through Our Website: We encourage you to apply through our website for a smoother application process. It helps us keep everything organised and ensures your application gets the attention it deserves. Plus, it’s super easy!
How to prepare for a job interview at Berkeley Square - Talent Specialists in IT & Engineering
✨Know Your Stuff
Make sure you brush up on your SystemVerilog skills and be ready to discuss UVM or similar frameworks. Familiarise yourself with FPGA and ASIC design principles, as well as any relevant tools like Verilator and Cocotb. The more you know, the more confident you'll feel!
✨Show Off Your Problem-Solving Skills
Be prepared to tackle some technical questions or scenarios during the interview. Think about past experiences where you debugged complex RTL issues or improved verification environments. Sharing specific examples will demonstrate your expertise and problem-solving abilities.
✨Collaboration is Key
Since this role involves working closely with hardware designers, highlight your teamwork skills. Be ready to discuss how you've collaborated on projects in the past, especially when it comes to managing test suites or contributing to open-source projects. Team players are always a plus!
✨Ask Smart Questions
Prepare thoughtful questions about the company's verification processes, tools, and team dynamics. This shows your genuine interest in the role and helps you gauge if it's the right fit for you. Plus, it gives you a chance to engage with your interviewers and make a lasting impression!
