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- Tasks: Build cutting-edge formal verification environments to find bugs in advanced tech designs.
- Company: Axiomise is a pioneering firm in formal verification training and consulting for the semiconductor industry.
- Benefits: Enjoy flexible working hours, a company pension, and opportunities to publish papers and file patents.
- Why this job: Join a culture of innovation where your ideas matter and you can tackle challenging problems.
- Qualifications: Bachelor/Masters/Doctorate in EEE/ECE/CS/Maths with skills in Verilog/VHDL and scripting languages.
- Other info: Expect a dynamic work environment with a flat structure and a diverse team.
The predicted salary is between 32000 - 46000 £ per year.
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People Management, Operations & Talent Attraction for Tech | PMP & PRINCE2
About us: Axiomise is the world’s only formal verification (FV) training, consulting, services and custom
solutions company. In its 8th year, we have delivered training to over a hundred engineers globally and provided our consulting & services to some of the best names in the semiconductor industry. We designed the industry’s first and only vendor-neutral fully automated RISC-V formal verification app that has been used to find bugs in pre-existing processors and exhaustively prove bug absence. We love formal methods, and we use them
day and night to sign-off designs, so our customers do not leave bugs in silicon.
Snapshot of our culture: We do not have a hierarchical structure so you will learn fast. We focus on innovation and every individual is invited to build cool new solutions, publish papers, file patents, and work live with customers.
We are an equal opportunity employer, having a representation of 11 nationalities and 41% female employees.
We are looking for bright spirited individuals with a positive can-do attitude. We often work on very challenging problems that are not always solvable within a 9-to-5 framework, so we expect our team to put in extra hours if needed.
We welcome our engineering talent to also get involved in other areas of our business and we take pride that we are agile and can respond swiftly to our customer and employee needs.
About the Job:
We are looking to hire top-notch engineering talent for the UK. Your typical day job would involve building cutting-edge formal verification testbench environments to find bugs and build proofs of bug absence in SoCs containing processors, video/GPUs, networking, AI/ML designs. Formal verification is the only way to generate proofs of correctness and build proofs of bug absence. We train engineers in the best-known semiconductor names, and you can assume that we will provide you with the best FV training to get you started. All we expect from you is a passion for digital design, computer architecture and problem-solving.
There is a substantial amount of hands-on work on formal verification of processors, GPU blocks, networking designs or AI/ML. The work will include building strategy, verification plans, testbenches and sign-off using the Axiomise six-dimensional coverage methodology.
You are expected to be confident in Verilog/VHDL as well as fluent in SVA and Tcl/Perl/Python and Unix/Linux scripting.
Profile of a successful candidate:
Education
Bachelor/Masters/Doctorate in EEE/ECE/CS/Maths
Technical Skills:
RISC-V/Arm/x86/MIPS
SVA/PSL/Theorem proving
Tcl/Python/Bash
Soft Skills
Problem solving
Ownership
Autonomy
Team spirit
Experience :
0-5 years
Once hired by us, the company offers compensation based on prevailing market rates and a generous package of benefits, such as:
Company Pension
Employee Assistance Programme
Eye Test Vouchers
Cycle to Work Scheme
Employee Birthday Treat
Employee Recognition Awards
Employee Coffee Mornings
Bonus System
Potential to file patents, publish papers at top conferences
Social and Well-Being Events
Flexible Working Hours
Hiring process
As a process, our recruitment follows 3 stages:
1. Math test
2.Technical interview
3. HR interview.
Seniority level
-
Seniority level
Entry level
Employment type
-
Employment type
Full-time
Job function
-
Job function
Quality Assurance
-
Industries
Semiconductor Manufacturing
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Formal Verification Engineer employer: Axiomise
Contact Detail:
Axiomise Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Formal Verification Engineer
✨Tip Number 1
Familiarise yourself with formal verification concepts and tools. Since Axiomise focuses on cutting-edge formal verification, having a solid understanding of the principles and methodologies will help you stand out during interviews.
✨Tip Number 2
Brush up on your programming skills, especially in Verilog, VHDL, and scripting languages like Tcl and Python. Being able to demonstrate your coding proficiency can significantly boost your chances of impressing the hiring team.
✨Tip Number 3
Engage with the semiconductor community online. Join forums or groups related to formal verification and semiconductor design. Networking with professionals in the field can provide insights and potentially lead to referrals.
✨Tip Number 4
Prepare for the technical interview by practising problem-solving scenarios relevant to formal verification. Familiarise yourself with common challenges faced in the industry, as this will showcase your readiness to tackle real-world issues.
We think you need these skills to ace Formal Verification Engineer
Some tips for your application 🫡
Understand the Role: Before applying, make sure you fully understand the responsibilities of a Formal Verification Engineer. Familiarise yourself with formal verification concepts, tools, and methodologies mentioned in the job description.
Tailor Your CV: Customise your CV to highlight relevant skills and experiences that align with the job requirements. Emphasise your knowledge in Verilog/VHDL, SVA, and any experience with RISC-V or similar architectures.
Craft a Compelling Cover Letter: Write a cover letter that showcases your passion for digital design and problem-solving. Mention specific projects or experiences that demonstrate your technical skills and how they relate to the role at Axiomise.
Showcase Soft Skills: In your application, don't forget to highlight your soft skills such as problem-solving, ownership, and teamwork. These are crucial for the collaborative and innovative culture at Axiomise.
How to prepare for a job interview at Axiomise
✨Brush Up on Formal Verification Concepts
Make sure you have a solid understanding of formal verification principles, especially related to SoCs and the methodologies used in the industry. Familiarise yourself with Axiomise's six-dimensional coverage methodology, as this will likely come up during your interview.
✨Showcase Your Technical Skills
Be prepared to discuss your experience with Verilog/VHDL, SVA, and scripting languages like Tcl/Python. You might be asked to solve technical problems or even demonstrate your coding skills, so practice relevant exercises beforehand.
✨Demonstrate Problem-Solving Abilities
Axiomise values problem-solving skills highly. Be ready to share examples from your past experiences where you tackled challenging issues, particularly in digital design or computer architecture. Highlight your thought process and how you arrived at solutions.
✨Emphasise Team Spirit and Autonomy
Since Axiomise promotes a non-hierarchical structure, it's important to convey your ability to work both independently and collaboratively. Share instances where you've taken ownership of projects while also contributing to team efforts.
