Senior/Staff DFT Engineer
Senior/Staff DFT Engineer

Senior/Staff DFT Engineer

Full-Time 43200 - 72000 ÂŁ / year (est.) No home office possible
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At a Glance

  • Tasks: Design and validate test solutions for cutting-edge SoCs in a dynamic startup.
  • Company: Join Axelera AI, a pioneering deep-tech startup with a global team.
  • Benefits: Attractive compensation, pension plan, employee insurances, and company shares.
  • Why this job: Make a real impact on AI innovation while collaborating with top engineers.
  • Qualifications: 5+ years in DFT engineering with skills in SystemVerilog, TCL, and Python.
  • Other info: Flexible working arrangements and a commitment to diversity and inclusion.

The predicted salary is between 43200 - 72000 ÂŁ per year.

About Us

Axelera AI is not your regular deep‑tech startup. We are creating the next‑generation AI platform to support anyone who wants to help advancing humanity and improve the world around us. In just four years, we have raised a total of $120 million and have built a world‑class team of 220+ employees (including 49+ PhDs with more than 40,000 citations), both remotely from 17 different countries and with offices in Belgium, France, Switzerland, Italy, the UK, headquartered at the High Tech Campus in Eindhoven, Netherlands. We have also launched our Metis™ AI Platform, which achieves a 3‑5x increase in efficiency and performance, and have visibility into a strong business pipeline exceeding $100 million. Our unwavering commitment to innovation has firmly established us as a global industry pioneer. Are you up for the challenge?

Position Overview

We are looking for a Senior DFT Engineer to join our multicore in‑memory‑compute SoC team. You will design, implement, and validate test solutions for our complex SoCs, collaborating with a talented team of engineers across Europe. This is your chance to work on cutting‑edge architectures, improve silicon testability, and make a real impact in a fast‑moving startup environment.

Key Responsibilities

  • Implement scan insertion, ATPG, Memory BIST, JTAG/IJTAG, and fault simulation flows.
  • Collaborate with RTL, verification, and physical design teams to integrate DFT solutions efficiently.
  • Support silicon bring‑up and debug, helping to optimize test coverage and yield.
  • Contribute to methodology improvements and share best practices with team members.

Qualifications

Experience: minimum of 5 years in DFT engineering, preferably with complex SoC projects.

Skills: SystemVerilog RTL, TCL, Python, Unix/Linux workflows.

Core Knowledge: Hierarchical scan, ATPG, Memory BIST, JTAG/IJTAG, fault simulation, silicon debug, gate‑level verification.

Tools: Siemens, Synopsys, or Cadence DFT tool experience.

Bonus: Familiarity with IEEE 1149.x / 1500 / 1687 standards, synthesis flow, timing analysis. Strong problem‑solving skills, collaboration, and passion for semiconductor innovation.

Location – Working Arrangement

We offer a flexible working arrangement, with options to:

  • Work from one of our Axelera AI offices (Leuven in Belgium, Amsterdam and Eindhoven in the Netherlands, Zurich in Switzerland, Florence and Milan in Italy or Bristol in the United Kingdom) if you're already based in the vicinity.
  • Work fully remotely from any European country (incl. the UK) you are already in.
  • Relocate with us and work from Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven).

Kindly note that priority will be given to candidates who are interested in being based in Belgium or Italy.

What We Offer

This is your chance to shape and be part of a dynamic, fast‑growing, international organization. We offer an attractive compensation package, including a pension plan, extensive employee insurances and the option to get company shares. An open culture that supports creativity and continual innovation is awaiting you. Collaborative ownership and freedom with responsibility is characteristic for the way we act and work as a team. At Axelera AI, we wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI.

Senior/Staff DFT Engineer employer: Axelera AI

Axelera AI is an exceptional employer, offering a vibrant and inclusive work culture that fosters creativity and innovation. With flexible working arrangements across multiple European locations, employees benefit from a competitive compensation package, including pension plans and share options, while being part of a dynamic team dedicated to advancing AI technology for the betterment of humanity. Join us at our High Tech Campus in Eindhoven or remotely, and be part of a pioneering journey in the tech industry.
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Contact Detail:

Axelera AI Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Senior/Staff DFT Engineer

✨Tip Number 1

Network like a pro! Reach out to current employees at Axelera AI on LinkedIn or other platforms. Ask them about their experiences and any tips they might have for landing a role. Personal connections can make a huge difference!

✨Tip Number 2

Prepare for the interview by brushing up on your technical skills. Since you're applying for a Senior DFT Engineer position, be ready to discuss your experience with SystemVerilog, ATPG, and silicon debug. Show us your passion for semiconductor innovation!

✨Tip Number 3

Don’t just focus on your qualifications; highlight your collaborative spirit! At Axelera AI, teamwork is key. Share examples of how you've worked with cross-functional teams in the past to solve complex problems.

✨Tip Number 4

Apply through our website! It’s the best way to ensure your application gets seen by the right people. Plus, it shows you’re genuinely interested in being part of our innovative team at Axelera AI.

We think you need these skills to ace Senior/Staff DFT Engineer

DFT Engineering
SystemVerilog RTL
TCL
Python
Unix/Linux Workflows
Hierarchical Scan
ATPG
Memory BIST
JTAG/IJTAG
Fault Simulation
Silicon Debug
Gate-Level Verification
Siemens DFT Tools
Synopsys DFT Tools
Cadence DFT Tools
Problem-Solving Skills
Collaboration

Some tips for your application 🫡

Tailor Your CV: Make sure your CV is tailored to the Senior DFT Engineer role. Highlight your experience with DFT engineering, especially in complex SoC projects, and don’t forget to mention your skills in SystemVerilog RTL, TCL, and Python.

Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Share your passion for semiconductor innovation and how your background aligns with our mission at Axelera AI. Be sure to mention any relevant projects or achievements that showcase your expertise.

Showcase Collaboration Skills: Since we value teamwork, make sure to highlight your collaboration experiences. Talk about how you've worked with RTL, verification, and physical design teams in the past to integrate DFT solutions effectively.

Apply Through Our Website: We encourage you to apply through our website for a smoother application process. It’s the best way for us to receive your application and get you on board to help shape the future of AI!

How to prepare for a job interview at Axelera AI

✨Know Your DFT Inside Out

Make sure you brush up on your knowledge of DFT concepts like scan insertion, ATPG, and Memory BIST. Be ready to discuss how you've implemented these in past projects, as well as any challenges you faced and how you overcame them.

✨Showcase Your Collaboration Skills

Since the role involves working with various teams, be prepared to share examples of how you've successfully collaborated with RTL, verification, and physical design teams. Highlight specific instances where your teamwork led to improved outcomes.

✨Demonstrate Problem-Solving Prowess

Expect questions that test your problem-solving abilities, especially related to silicon debug and fault simulation. Prepare to walk through a complex issue you resolved, detailing your thought process and the tools you used.

✨Familiarise Yourself with Their Tools

Research the specific DFT tools mentioned in the job description, like Siemens, Synopsys, or Cadence. If possible, get hands-on experience or at least understand their functionalities so you can speak confidently about them during the interview.

Senior/Staff DFT Engineer
Axelera AI

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