JPMorgan Chase is seeking an Ultra Low Latency C++ Lead Software Engineer within the Electronic Trading Technology team in London. You will design, build, and operate market gateway solutions with FPGA acceleration, driving stability, latency optimization, and regulatory compliance.
You will partner with hardware teams to integrate FPGA pipelines with a high-performance C++ stack, affecting trading connectivity and risk management applications used globally.
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Ultra-Low Latency C++ Lead with FPGA Acceleration employer: Aumni
At JPMorgan Chase, we pride ourselves on fostering a dynamic and inclusive work environment where innovation thrives. As a Lead Data Engineer, you'll not only lead a talented squad but also benefit from extensive professional development opportunities, competitive compensation, and a commitment to work-life balance in the heart of a global financial hub. Join us to be part of a team that values your contributions and supports your growth in a rapidly evolving industry.
